摘要:
A thin film transistor includes a substrate, a gate electrode on the substrate, a gate insulating layer covering the gate electrode, a first semiconductor layer and a second semiconductor layer overlapping the gate electrode on the gate insulating layer and separated from each other, a first source electrode and a first drain electrode on the first semiconductor layer and on opposite sides of the gate electrode, and a second source electrode and a second drain electrode on the second semiconductor layer and on opposite sides of the gate electrode, wherein the first source electrode is coupled to the second source electrode through a source connection overlapping the gate electrode, and the first drain electrode is coupled to the second drain electrode, such that the on current and off current characteristics of the thin film transistor may be constantly maintained regardless of alignment error.
摘要:
A thin film transistor (TFT) having an offset structure is disclosed. The TFT maintains a sufficiently low “off” current and a sufficiently high “on” current. The TFT includes an active region. The active region includes a gate electrode; an active layer that overlaps with the gate electrode; a gate insulating layer between the gate electrode and the active layer; and a source/drain electrode layer including source/drain electrodes that are electrically connected to the active region. Some of the source/drain electrodes overlap partially with the gate electrode. Other of the source/drain electrodes are offset from the gate electrode. The source/drain electrodes and the gate electrode are in a symmetrical arrangement.
摘要:
A thin film transistor (TFT) having an offset structure is disclosed. The TFT maintains a sufficiently low “off” current and a sufficiently high “on” current. The TFT includes an active region. The active region includes a gate electrode; an active layer that overlaps with the gate electrode; a gate insulating layer between the gate electrode and the active layer; and a source/drain electrode layer including source/drain electrodes that are electrically connected to the active region. Some of the source/drain electrodes overlap partially with the gate electrode. Other of the source/drain electrodes are offset from the gate electrode. The source/drain electrodes and the gate electrode are in a symmetrical arrangement.