公开(公告)号：US20070234177A1

公开(公告)日：2007-10-04

申请号：US11616480

申请日：2006-12-27

申请人： Ki-Man Jeon ,  Chang-Won Park ,  Young-Hwan Kim ,  Ki-Tae Kim ,  Hyun-bean Yi ,  Sung-Ju Park

发明人： Ki-Man Jeon ,  Chang-Won Park ,  Young-Hwan Kim ,  Ki-Tae Kim ,  Hyun-bean Yi ,  Sung-Ju Park

IPC分类号： H03M13/09

CPC分类号： H03M13/091 ,  H03M13/6575

摘要： A method and an apparatus for checking a pipelined parallel cyclic redundancy is disclosed. In accordance with the method and the apparatus of the present invention, after an entire CRC (cyclic redundancy check) logic is divided into a feedback portion and an input data portion, the input data portion is divided using a pipelined structure such that the input data portion is designed to have the pipelined structure based on an algorithm that maintains a logic level of each stage to be lower than that of the feedback portion and an algorithm that optimizes a size of a register inserted during the division to improve a speed thereof and to detect an error of a received data in a high speed data communication apparatus.

摘要翻译： 公开了一种用于检查流水线并行循环冗余的方法和装置。 根据本发明的方法和装置，在整个CRC（循环冗余校验）逻辑被分成反馈部分和输入数据部分之后，使用流水线结构划分输入数据部分，使得输入数据 该部分被设计成具有基于维持每个级的逻辑电平低于反馈部分的算法的流水线结构，以及优化在分割期间插入的寄存器的大小以提高其速度和 在高速数据通信装置中检测接收到的数据的错误。

公开(公告)号：US07895499B2

公开(公告)日：2011-02-22

申请号：US11616480

申请日：2006-12-27

申请人： Ki-Man Jeon ,  Chang-Won Park ,  Young-Hwan Kim ,  Ki-Tae Kim ,  Hyun-bean Yi ,  Sung-Ju Park

发明人： Ki-Man Jeon ,  Chang-Won Park ,  Young-Hwan Kim ,  Ki-Tae Kim ,  Hyun-bean Yi ,  Sung-Ju Park

IPC分类号： H03M13/00

CPC分类号： H03M13/091 ,  H03M13/6575

摘要： A method and an apparatus for checking a pipelined parallel cyclic redundancy is disclosed. In accordance with the method and the apparatus of the present invention, after an entire CRC (cyclic redundancy check) logic is divided into a feedback portion and an input data portion, the input data portion is divided using a pipelined structure such that the input data portion is designed to have the pipelined structure based on an algorithm that maintains a logic level of each stage to be lower than that of the feedback portion and an algorithm that optimizes a size of a register inserted during the division to improve a speed thereof and to detect an error of a received data in a high speed data communication apparatus.

摘要翻译： 公开了一种用于检查流水线并行循环冗余的方法和装置。 根据本发明的方法和装置，在整个CRC（循环冗余校验）逻辑被分成反馈部分和输入数据部分之后，使用流水线结构划分输入数据部分，使得输入数据 该部分被设计成具有基于维持每个级的逻辑电平低于反馈部分的算法的流水线结构，以及优化在分割期间插入的寄存器的大小以提高其速度和 在高速数据通信装置中检测接收到的数据的错误。