ENHANCING CACHE DIRTY INFORMATION

    公开(公告)号:US20230023940A1

    公开(公告)日:2023-01-26

    申请号:US17888292

    申请日:2022-08-15

    IPC分类号: G06F12/0804

    摘要: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.

    ENHANCING CACHE DIRTY INFORMATION

    公开(公告)号:US20220292017A1

    公开(公告)日:2022-09-15

    申请号:US17200149

    申请日:2021-03-12

    IPC分类号: G06F12/0804

    摘要: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.

    Enhancing cache dirty information

    公开(公告)号:US11954031B2

    公开(公告)日:2024-04-09

    申请号:US17888292

    申请日:2022-08-15

    摘要: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.

    Enhancing cache dirty information

    公开(公告)号:US11449423B1

    公开(公告)日:2022-09-20

    申请号:US17200149

    申请日:2021-03-12

    摘要: A method performed by a controller comprising assigning a first status indicator to entries in a first address line in a volatile memory belonging to a first region of an LUT stored in a non-volatile memory, and a second status indicator to entries in the first address line in the volatile memory belonging to a second region of the LUT, setting either the first or second status indicator to a dirty status based on whether a cache updated entry at an address m in the volatile memory belongs to the first or second region of the LUT, and writing, based on the dirty status of the first and second status indicator at the address m, all entries in the volatile memory associated with the first region or the second region containing the updated entry to the non-volatile memory.