Semiconductor memory device
    1.
    发明授权

    公开(公告)号:US11515300B2

    公开(公告)日:2022-11-29

    申请号:US17016827

    申请日:2020-09-10

    Abstract: A semiconductor memory device includes a first chip and a second chip. The first chip includes a semiconductor substrate and a plurality of transistors disposed on a surface of the semiconductor substrate. The second chip includes a plurality of first conductive layers, a plurality of first semiconductor layers, and a plurality of memory cells disposed in intersection portions of the plurality of first conductive layers and the plurality of first semiconductor layers. The second chip includes a second semiconductor layer farther from the semiconductor substrate than the plurality of first conductive layers. The second semiconductor layer is connected to the plurality of first semiconductor layers and a first insulating layer that includes a part farther from the semiconductor substrate than a surface on a side opposite to the semiconductor substrate of the second semiconductor layer and a part closer to the semiconductor substrate than the surface.

    Semiconductor storage device
    2.
    发明授权

    公开(公告)号:US12101928B2

    公开(公告)日:2024-09-24

    申请号:US17460967

    申请日:2021-08-30

    CPC classification number: H10B41/27 H10B41/10 H10B43/10 H10B43/27

    Abstract: A semiconductor storage device includes a first conductive layer that extends in a first direction; a second conductive layer that extends in the first direction and is arranged with the first conductive layer in a second direction; a first insulating layer that is provided between the first conductive layer and the second conductive layer; a semiconductor layer that extends in the second direction and faces the first conductive layer, the second conductive layer, and the first insulating layer in a third direction; a first charge storage layer that is provided between the first conductive layer and the semiconductor layer; a second charge storage layer that is provided between the second conductive layer and the semiconductor layer; a first high dielectric constant layer that is provided between the first conductive layer and the first charge storage layer; and a second high dielectric constant layer provided between the second conductive layer and the second charge storage layer. At least a portion of the first charge storage layer faces the second charge storage layer without the second high dielectric constant layer being interposed between the portion of the first charge storage layer and the second charge storage layer in the second direction.

    Semiconductor memory device
    3.
    发明授权

    公开(公告)号:US12075620B2

    公开(公告)日:2024-08-27

    申请号:US17397165

    申请日:2021-08-09

    Abstract: A semiconductor memory device includes a substrate, conductive layers arranged in a first direction and extend in a second direction, a semiconductor layer extending in the first direction and opposed to the conductive layers, and n contact electrode regions arranged in a third direction. The n is a power of 2. The contact electrode region includes contact electrodes arranged in the second direction. The conductive layers include a first conductive layer and a second conductive layer that is an n-th conductive layer counted from the first conductive layer. The contact electrodes include a first contact electrode connected to the first conductive layer, a second contact electrode connected to the second conductive layer, and a third contact electrode disposed between them. The first contact electrode, the second contact electrode, and the third contact electrode are arranged in the second direction or the third direction.

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