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公开(公告)号:US11151927B2
公开(公告)日:2021-10-19
申请号:US16937079
申请日:2020-07-23
Applicant: Kunshan New Flat Panel Display Technology Center Co., Ltd. , KunShan Go-Visionox Opto-Electronics Co., Ltd
Inventor: Tingting Zhang , Yanqin Song , Siming Hu , Hui Zhu , Li Lin
Abstract: An integrated circuit, a mobile phone and a display are provided with the integrated circuit. The integrated circuit includes a substrate, a data distributor and a data driver distributed on the substrate. A power line trace gap is provided within the data distributor; a first data line connected to the data driver and to the data distributor; and a first power line connected to the data driver and passing through the power line trace gap.
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公开(公告)号:US10733929B2
公开(公告)日:2020-08-04
申请号:US16322071
申请日:2018-01-05
Applicant: Kunshan New Flat Panel Display Technology Center Co., Ltd. , KunShan Go-Visionox Opto-Electronics Co., Ltd
Inventor: Tingting Zhang , Yanqian Song , Siming Hu , Hui Zhu , Li Lin
Abstract: An integrated circuit, a mobile phone and a display are provided with the integrated circuit. The integrated circuit includes a substrate, a data distributor and a data driver distributed on the substrate. A power line trace gap is provided within the data distributor; a first data line connected to the data driver and to the data distributor; and a first power line connected to the data driver and passing through the power line trace gap.
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公开(公告)号:US11119536B2
公开(公告)日:2021-09-14
申请号:US15778481
申请日:2017-03-09
Applicant: KUNSHAN NEW FLAT PANEL DISPLAY TECHNOLOGY CENTER CO., LTD. , KUNSHAN GO-VISIONOX OPTO-ELECTRONICS CO., LTD.
Inventor: Qi Shan , Kun Hu , Li Lin , Shixing Cai , Shengfang Liu
IPC: G06F1/16 , G09F9/30 , G02F1/1333 , H01L27/12 , H01L51/00
Abstract: Provided are a flexible electronic device and a manufacturing method thereof. The flexible electronic device (200) comprises a flexible substrate (210) and a device layer formed on the flexible substrate (210). The device layer comprises a semiconductor structure (220) and a wire structure (230) connected to the semiconductor structure, the wire structure (230) having an extension direction same to a channel direction of the semiconductor structure (220). The extension direction of the first wire structure (230) forms an included angle smaller than 90° with respect to a stretching direction of the flexible substrate (210). In the flexible electronic device (200) and manufacturing method thereof of the present invention, the channel direction of the semiconductor structure (220) and the extension direction of the first wire structure (230) are adjusted, such that the semiconductor structure (220) and the first wire structure (230) are least affected by a stress, thus ensuring electrical property and flexibility of the flexible electronic device (200).
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公开(公告)号:US11114016B2
公开(公告)日:2021-09-07
申请号:US17011212
申请日:2020-09-03
Inventor: Mingxing Liu , Xiaoyu Gao , Pengle Dang , Li Lin , Shuaiyan Gan , Feng Gao
IPC: G09G3/20
Abstract: Provided are a pixel arrangement structure, a display panel, and a display apparatus. The pixel arrangement structure includes a plurality of first sub-pixels, a plurality of second sub-pixels, and a plurality of third sub-pixels, and the plurality of first, second and third sub-pixels form a plurality of virtual polygons. In each virtual polygon, the second sub-pixels and the third sub-pixels are located at a first vertex and a second vertex of the virtual polygon, respectively, the first vertex and the second vertex are alternated and spaced apart from each other, the first sub-pixel is located inside the virtual polygon, a first distance from a center of the first sub-pixel to a center of any third sub-pixel is equal, a second distance from a center of the first sub-pixel to a center of any second sub-pixel is equal, and the first distance is equal to the second distance.
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公开(公告)号:US10802541B2
公开(公告)日:2020-10-13
申请号:US16557167
申请日:2019-08-30
Inventor: Li Lin , Xiuqi Huang , Bo Yuan , Shixing Cai , Kun Hu
IPC: G06F1/16
Abstract: A foldable display screen solves the problem of low reliability of foldable display screens in the prior art. The foldable display screen includes a meander line. The foldable display screen includes at least one gap located at an end of the meander line.
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公开(公告)号:US11881128B2
公开(公告)日:2024-01-23
申请号:US17182248
申请日:2021-02-23
Applicant: KUNSHAN NEW FLAT PANEL DISPLAY TECHNOLOGY CENTER CO., LTD. , KUNSHAN GO-VISIONOX OPTO-ELECTRONICS CO., LTD.
Inventor: Gang Wang , Li Lin , Zhenzhen Han , Siming Hu , Weilong Li , Lu Zhang
CPC classification number: G09F9/301
Abstract: The present disclosure relates to a display panel, a display device and a method for manufacturing the display panel. The display panel includes a display area and a bending area located outside the display area; and includes a substrate and a plurality of metal traces, the substrate includes a first barrier layer provided with a plurality of through-hole grooves, and the plurality of metal traces are located on the first barrier layer, and arranged by avoiding the through-hole grooves on the first barrier layer.
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公开(公告)号:US20180097119A1
公开(公告)日:2018-04-05
申请号:US15830423
申请日:2017-12-04
Applicant: Kunshan Go-Visionox Opto-Electronics Co., Ltd. , Kunshan New Flat Panel Display Technology Center Co., Ltd.
Inventor: Qi SHAN , Xiuqi Huang , Shixing Cai , Xiaobao Zhang , Rui Guo , Li Lin , Xiaoyu Gao
IPC: H01L29/786 , H01L29/66
Abstract: A thin film transistor and a preparation method thereof are provided. The thin film transistor includes an upper gate electrode, a lower gate electrode, an upper insulating layer, a lower insulating layer, a semiconductor layer, a source electrode and a drain electrode. The lower insulating layer is arranged on the lower gate electrode, the semiconductor layer is arranged on the lower insulating layer, the semiconductor layer is respectively lapped with the source electrode and the drain electrode, the upper insulating layer covers the semiconductor layer, and the upper gate electrode is arranged on the upper insulating layer. In a plane parallel to a conducting channel, there is a first gap between an orthographic projection of the upper gate electrode and an orthographic projection of the source electrode, and there is a second gap between the orthographic projection of the upper gate electrode and an orthographic projection of the drain electrode.
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公开(公告)号:US10903303B2
公开(公告)日:2021-01-26
申请号:US16801181
申请日:2020-02-26
Applicant: YUNGU (GU'AN) TECHNOLOGY CO., LTD. , Kunshan Go-Visionox Opto-Electronics Co., Ltd. , KUNSHAN VISIONOX TECHNOLOGY CO., LTD.
Inventor: Junhui Lou , Yanan Ji , Yanqin Song , Leping An , Shixing Cai , Li Lin
Abstract: The present disclosure relates to a display panel, a display screen, and a terminal device. The display panel includes a substrate, a first pixel electrode overlaying the substrate, a pixel definition layer overlaying a side of the first pixel electrode away from the substrate and including a plurality of pixel openings to expose a surface of the first pixel electrode, and a first type of separation pillar disposed on the pixel definition layer. A width of the first type of separation pillar changes continuously or intermittently in an extending direction thereof. The extending direction of the first type of separation pillar is parallel to the substrate. The width is a dimension of a projection of the first type of separation pillar on the substrate in a direction perpendicular to the extending direction of the first type of separation pillar.
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公开(公告)号:US10665725B2
公开(公告)日:2020-05-26
申请号:US15830423
申请日:2017-12-04
Applicant: Kunshan New Flat Panel Display Technology Center Co., Ltd. , Kunshan Go-Visionox Opto-Electronics Co., Ltd.
Inventor: Qi Shan , Xiuqi Huang , Shixing Cai , Xiaobao Zhang , Rui Guo , Li Lin , Xiaoyu Gao
IPC: H01L29/786 , H01L29/66
Abstract: A thin film transistor and a preparation method thereof are provided. The thin film transistor includes an upper gate electrode, a lower gate electrode, an upper insulating layer, a lower insulating layer, a semiconductor layer, a source electrode and a drain electrode. The lower insulating layer is arranged on the lower gate electrode, the semiconductor layer is arranged on the lower insulating layer, the semiconductor layer is respectively lapped with the source electrode and the drain electrode, the upper insulating layer covers the semiconductor layer, and the upper gate electrode is arranged on the upper insulating layer. In a plane parallel to a conducting channel, there is a first gap between an orthographic projection of the upper gate electrode and an orthographic projection of the source electrode, and there is a second gap between the orthographic projection of the upper gate electrode and an orthographic projection of the drain electrode.
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