公开(公告)号：US20240362150A1

公开(公告)日：2024-10-31

申请号：US18642829

申请日：2024-04-23

申请人： LAPIS Technology Co., Ltd.

发明人： Kenji NOZAKI

IPC分类号： G06F11/36

CPC分类号： G06F11/3648 ,  G06F11/3636

摘要： A debug circuit is provided in an information processing device and performs debugging of a polling program that polls a flag of a control register used for control on a peripheral function of the information processing device. The debug circuit includes: an execution instruction detection circuit that detects an execution instruction of the peripheral function to generate a detection signal; an expected value comparison circuit that compares a flag value of a flag read from the control register against an expected value of the flag; and a polling time measurement circuit that measures a polling value related to polling of the flag of the control register based on the detection signal and a comparison result obtained by the expected value comparison circuit.