公开(公告)号：US08987746B2

公开(公告)日：2015-03-24

申请号：US14104156

申请日：2013-12-12

Applicant: LG Display Co., Ltd.

Inventor： Eui-Hyun Chung ,  Jung-Il Lee ,  Ka-Kyung Kim

IPC: H01L21/00 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1362 ,  G02F1/134363 ,  G02F1/136227 ,  G02F2001/134345 ,  G02F2001/134372 ,  H01L27/124

Abstract: An array substrate for a liquid crystal display device, comprises: a substrate having a display region and a non-display region; a gate line and first and second data lines on the substrate; first and second thin film transistors in the first and second pixel regions, respectively, the first thin film transistor connected to the gate line and the first data line, the second thin film transistor connected to the gate line and the second data line; a planarization layer on the first and second thin film transistors, the planarization layer having a drain contact hole exposing both of drain electrodes of the first and second thin film transistors; and a pixel electrode and a common electrode over the planarization layer.

Abstract translation: 一种液晶显示装置用阵列基板，包括：具有显示区域和非显示区域的基板; 栅极线和衬底上的第一和第二数据线; 分别在第一和第二像素区域中的第一和第二薄膜晶体管，连接到栅极线和第一数据线的第一薄膜晶体管，连接到栅极线和第二数据线的第二薄膜晶体管; 在第一和第二薄膜晶体管上的平坦化层，平坦化层具有暴露第一和第二薄膜晶体管的漏电极的漏极接触孔; 以及平坦化层上的像素电极和公共电极。

公开(公告)号：US20140319530A1

公开(公告)日：2014-10-30

申请号：US14104156

申请日：2013-12-12

Applicant: LG DISPLAY CO., LTD.

Inventor： Eui-Hyun Chung ,  Jung-II Lee ,  Ka-Kyung Kim

IPC: G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1362 ,  G02F1/134363 ,  G02F1/136227 ,  G02F2001/134345 ,  G02F2001/134372 ,  H01L27/124

Abstract: An array substrate for a liquid crystal display device, comprises: a substrate having a display region and a non-display region; a gate line and first and second data lines on the substrate; first and second thin film transistors in the first and second pixel regions, respectively, the first thin film transistor connected to the gate line and the first data line, the second thin film transistor connected to the gate line and the second data line; a planarization layer on the first and second thin film transistors, the planarization layer having a drain contact hole exposing both of drain electrodes of the first and second thin film transistors; and a pixel electrode and a common electrode over the planarization layer.

Abstract translation: 一种液晶显示装置用阵列基板，包括：具有显示区域和非显示区域的基板; 栅极线和衬底上的第一和第二数据线; 分别在第一和第二像素区域中的第一和第二薄膜晶体管，连接到栅极线和第一数据线的第一薄膜晶体管，连接到栅极线和第二数据线的第二薄膜晶体管; 在第一和第二薄膜晶体管上的平坦化层，平坦化层具有暴露第一和第二薄膜晶体管的漏电极的漏极接触孔; 以及平坦化层上的像素电极和公共电极。