公开(公告)号：US12254821B2

公开(公告)日：2025-03-18

申请号：US18405527

申请日：2024-01-05

Applicant: LG DISPLAY CO., LTD.

Inventor： Sujin Hwang ,  Miyoung Son

IPC: G09G3/32

Abstract: In one aspect, a micro-LED display device includes a display panel with an array of a plurality of pixels, a first switch line, and a second switch line disposed in the display panel. Each of the plurality of pixels includes a micro-LED; a sub-pixel circuit configured to cause the micro-LED to emit light; and a Gate In Active (GIA) circuit configured to provide a scan signal to the sub-pixel circuit. The GIA circuit includes at least one gate driver configured to be enabled or disabled based on a first selection signal transmitted from the first switch line. The GIA circuit further includes at least one redundant gate driver configured to be enabled or disabled based on a second selection signal transmitted from the second switch line, wherein the redundant gate driver is enabled when the gate driver is disabled.

公开(公告)号：US11574598B2

公开(公告)日：2023-02-07

申请号：US17504999

申请日：2021-10-19

Applicant: LG Display Co., Ltd.

Inventor： Minkyu Chang ,  Miyoung Son ,  Hongjae Shin

IPC: G09G3/3266 ,  G09G3/3258

Abstract: Disclosed are a gate driver circuit having a reduced size, and a display device including the same. The gate driver circuit includes a plurality of stage circuits. Each stage circuit supplies a gate signal to each of gate lines arranged in a display panel, and includes a M node, a Q node, a QH node, and a QB node. Each stage circuit includes a gate signal output module configured to operate based on a voltage level of the Q node or a voltage level of the QB node to output first to j-th gate signals based on first to j-th scan clock signals or a first low-potential voltage.

公开(公告)号：US20220208104A1

公开(公告)日：2022-06-30

申请号：US17504999

申请日：2021-10-19

Applicant: LG Display Co., Ltd.

Inventor： Minkyu Chang ,  Miyoung Son ,  Hongjae Shin

IPC: G09G3/3266 ,  G09G3/3258

Abstract: Disclosed are a gate driver circuit having a reduced size, and a display device including the same. The gate driver circuit includes a plurality of stage circuits. Each stage circuit supplies a gate signal to each of gate lines arranged in a display panel, and includes a M node, a Q node, a QH node, and a QB node. Each stage circuit includes a gate signal output module configured to operate based on a voltage level of the Q node or a voltage level of the QB node to output first to j-th gate signals based on first to j-th scan clock signals or a first low-potential voltage.