公开(公告)号：US20220208062A1

公开(公告)日：2022-06-30

申请号：US17699040

申请日：2022-03-18

Applicant: LG Display Co., Ltd.

Inventor： ChungSik KONG ,  HongGyu HAN ,  MiHee SHIN ,  SeWan LEE

IPC: G09G3/20 ,  G09G3/36

Abstract: A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.

公开(公告)号：US20170316731A1

公开(公告)日：2017-11-02

申请号：US15498584

申请日：2017-04-27

Applicant: LG Display Co., Ltd.

Inventor： SungHyun CHO ,  ChungSik KONG ,  Byoungwoo KIM ,  Sungwook CHANG ,  DongSoo KIM

IPC: G09G3/20 ,  G11C19/00

CPC classification number: G09G3/2092 ,  G09G2300/0809 ,  G09G2310/0248 ,  G09G2310/0286 ,  G11C19/00 ,  G11C19/28

Abstract: Agate driving circuit and a display device are disclosed. The gate driving circuit includes a shift register including a plurality of stages. Among the stages, an Nth stage includes a first transistor charging a Q node and a junction stress control circuit. A pull-up transistor using the Q node as a gate input controls an output signal of a stage output terminal. The junction stress control circuit includes a first, second, and third control transistors. The first control transistor, the second control transistor, the third control transistor, and the first transistor are connected to each other through a common node. The second control transistor adjusts junction stresses for the first control transistor and the first transistor by controlling a voltage of the common node. When the second control transistor is turned off, the third control transistor discharges the voltage of the common node.

公开(公告)号：US20190156732A1

公开(公告)日：2019-05-23

申请号：US16107276

申请日：2018-08-21

Applicant: LG DISPLAY CO., LTD.

Inventor： ChungSik KONG ,  MiHee SHIN ,  GyuTae KANG

IPC: G09G3/30

CPC classification number: G09G3/30 ,  G09G3/3266 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0209 ,  G09G2320/0233

Abstract: An electroluminescent display device includes sub-pixels connected to gate lines, and a gate driver configured to supply a scan signal to at least one of the gate lines, and including stages. One of the stages includes a QB-node regulation unit configured to charge a QB-node and a QP-node to turn-on voltage by using a first gate clock signal and a second gate clock signal, and a pull-down unit configured to output a turn-off voltage in response to a voltage of the QP-node. The QB-node regulation unit includes a QP-node control part configured to invert a phase of a voltage of a Q1-node and apply the voltage of the inverted phase to the QP-node, and a QB-node control part configured to bootstrap the QP-node. Accordingly, by employing the gate driver including the QB-node regulation unit that provides a stable voltage to the QB-node and the QP-node, the reliability of the gate driver can be improved, and the bezel of the electroluminescence display device can be reduced.