ELECTROLUMINESCENT DISPLAY PANEL HAVING THE EMISSION DRIVING CIRCUIT

    公开(公告)号:US20220172680A1

    公开(公告)日:2022-06-02

    申请号:US17674790

    申请日:2022-02-17

    Abstract: According to one exemplary embodiment of the present disclosure, the electroluminescent display panel may include a plurality of pixels arranged along a row direction and a column direction, an emission line transmitting an emission signal to the plurality of pixels arranged along the row direction and an emission driving circuit providing an emission signal to the plurality of pixels. The emission driving circuit includes a plurality of emission stages wherein the number of emission stages is more than the number of the plurality of pixels arranged along the column direction. Therefore, the pulse width resolution of the display panel may be enhanced and the low gradation stain may be reduced.

    GATE DRIVING CIRCUIT AND IMAGE DISPLAY DEVICE INCLUDING THE SAME

    公开(公告)号:US20210201808A1

    公开(公告)日:2021-07-01

    申请号:US16943579

    申请日:2020-07-30

    Abstract: A gate driving circuit and an image display device including the gate driving circuit are provided. In some embodiments of the present disclosure, the gate driving circuit includes a plurality of stages configured to sequentially and repeatedly output a plurality of scan pulses having different pulse widths in response to a gate control signal applied from a timing controller and the plurality of stages sequentially generate the plurality of scan pulses having different pulse widths and phase-delayed in response to three-phase clock pulses among the gate control signals and sequentially supply the plurality of scan pulses to gate lines of a display panel to selectively adjust a light emission period or a color display period for each red pixel, green pixel, and blue pixel, thereby improving image quality.

    ELECTROLUMINESCENT DISPLAY PANEL HAVING THE EMISSION DRIVING CIRCUIT

    公开(公告)号:US20230290309A1

    公开(公告)日:2023-09-14

    申请号:US18318626

    申请日:2023-05-16

    CPC classification number: G09G3/3233 G09G2310/08 G09G3/3275

    Abstract: According to one exemplary embodiment of the present disclosure, the electroluminescent display panel may include a plurality of pixels arranged along a row direction and a column direction, an emission line transmitting an emission signal to the plurality of pixels arranged along the row direction and an emission driving circuit providing an emission signal to the plurality of pixels. The emission driving circuit includes a plurality of emission stages wherein the number of emission stages is more than the number of the plurality of pixels arranged along the column direction. Therefore, the pulse width resolution of the display panel may be enhanced and the low gradation stain may be reduced.

    ELECTROLUMINESCENT DISPLAY PANEL HAVING THE EMISSION DRIVING CIRCUIT

    公开(公告)号:US20210142725A1

    公开(公告)日:2021-05-13

    申请号:US17094395

    申请日:2020-11-10

    Abstract: According to one exemplary embodiment of the present disclosure, the electroluminescent display panel may include a plurality of pixels arranged along a row direction and a column direction, an emission line transmitting an emission signal to the plurality of pixels arranged along the row direction and an emission driving circuit providing an emission signal to the plurality of pixels. The emission driving circuit includes a plurality of emission stages wherein the number of emission stages is more than the number of the plurality of pixels arranged along the column direction. Therefore, the pulse width resolution of the display panel may be enhanced and the low gradation stain may be reduced.

    GATE DRIVING CIRCUIT AND ELECTROLUMINESCENT DISPLAY USING THE SAME

    公开(公告)号:US20190066604A1

    公开(公告)日:2019-02-28

    申请号:US16050129

    申请日:2018-07-31

    Abstract: An organic light emitting display comprises pixels connected to gate lines, and a gate driving circuit to supply a gate signal to at least one gate line, and having stages connected to each other in a cascading way. A nth (n is a positive integer) stage of the gate driving circuit includes a Q1 node charging unit to charge a Q1 node to a turn-on voltage using first and second clock signals in reverse-phase, and a pull-up transistor to apply the turn-on voltage to an output terminal in response to a Q1 node voltage. The Q1 node charging unit includes a first charging unit to charge the Q1 node voltage to the turn-on voltage using the second clock signal; and a second charging unit to charge a Q2 node, coupled to the Q1 node, using the first clock signal in a section where the Q1 node has the turn-on voltage.

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