公开(公告)号：US20230337470A1

公开(公告)日：2023-10-19

申请号：US18336017

申请日：2023-06-16

Applicant: LG Display Co,. Ltd.

Inventor： So-Hee CHOI

IPC: H10K59/121 ,  G09G3/3233

CPC classification number: H10K59/1213 ,  G09G3/3233 ,  G06F3/0412 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0233 ,  G09G2354/00

Abstract: A display apparatus includes a pixel and four thin film transistors (TFTs). The pixel includes a light emitting element that includes first and second electrodes and a light emitting layer. A first TFT, including a first semiconductor layer, is configured to provide a driving current to the light emitting element according to a data voltage. A second TFT, including a second semiconductor layer, is configured to control driving of the first TFT according to a gate voltage. A third TFT, including a third semiconductor layer, is configured to sense a threshold voltage of the first TFT to control driving of the first TFT. A fourth TFT, including a fourth semiconductor layer, is in the gate driving portion, configured to apply gate voltages to the second and third TFTs, wherein the fourth semiconductor layer is in a different layer from the first, second and third semiconductor layers.

公开(公告)号：US20240008322A1

公开(公告)日：2024-01-04

申请号：US18212574

申请日：2023-06-21

Applicant: LG Display Co., Ltd.

Inventor： So-Hee CHOI

IPC: H10K59/126 ,  H10K59/131

CPC classification number: H10K59/126 ,  H10K59/131

Abstract: A display device includes: a substrate having a display area and a non-display area; an emitting element electrically connected to a gate line and a data line, the emitting element including a first electrode, an emitting layer and a second electrode; a first thin film transistor (TFT) supplying a driving current to the emitting element according to a data voltage; a second TFT controlling an operation of the first TFT according to a gate voltage of the gate line; a third TFT controlling an operation of the first TFT by sensing a threshold voltage of the first TFT; a third electrode connecting the first drain electrode and the first electrode; and a fourth electrode on a same layer as the third electrode, overlapping the first semiconductor layer, the second semiconductor layer, or the third semiconductor layer.

公开(公告)号：US20240008320A1

公开(公告)日：2024-01-04

申请号：US18215112

申请日：2023-06-27

Applicant: LG Display Co., Ltd.

Inventor： So-Hee CHOI ,  Jun-Ho LEE ,  Sung-Bin RYU ,  Sung-Jin LEE ,  Jei-Hyun LEE

IPC: H10K59/124 ,  H01L29/786 ,  H10K59/40 ,  H10K59/38 ,  H10K59/80

CPC classification number: H10K59/124 ,  H01L29/78672 ,  H01L29/7869 ,  H10K59/40 ,  H10K59/38 ,  H10K59/873 ,  H10K2102/351

Abstract: A display apparatus include a substrate including a display area and a non-display area, a first transistor including a first oxide semiconductor layer on the substrate, a first insulating layer on the first oxide semiconductor layer and a first gate electrode on the first insulating layer, a second transistor including a second oxide semiconductor layer on the substrate, a second gate electrode on the first insulating layer and a second insulating layer on the second gate electrode, and a third transistor including a third oxide semiconductor layer on the substrate and a third gate electrode on the second insulating layer.

公开(公告)号：US20240008311A1

公开(公告)日：2024-01-04

申请号：US18215104

申请日：2023-06-27

Applicant: LG Display Co., Ltd.

Inventor： So-Hee CHOI ,  Jun-Ho LEE ,  Sung-Bin RYU ,  Sung-Jin LEE ,  Jei-Hyun LEE

IPC: H10K59/121 ,  G06F3/044 ,  G09G3/3208 ,  H10K59/40 ,  H01L27/12

CPC classification number: H10K59/1213 ,  G06F3/0446 ,  G09G3/3208 ,  H10K59/40 ,  H01L27/1237 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0426

Abstract: A display apparatus includes a substrate having a display area and a non-display area; a first transistor including a first semiconductor layer on the substrate, a first insulating layer on the first semiconductor layer, a first gate electrode on the first insulating layer and a second insulating layer on the first gate electrode, a second transistor including a second semiconductor layer on the substrate and a second gate electrode on the first insulating layer, and a third transistor including a third semiconductor layer on the substrate and a third gate electrode on the second insulating layer