公开(公告)号：US20040113878A1

公开(公告)日：2004-06-17

申请号：US10453651

申请日：2003-06-04

Applicant: LG.Philips LCD Co., Ltd.

Inventor： Jae Deok Park

IPC: G09G003/36

CPC classification number: G09G3/3685 ,  G09G3/3674 ,  G09G2310/0283 ,  G11C19/00

Abstract: A driving device includes a plurality of blocks arranged in sequence, each of the blocks includes ninth switching elements connected to received a start pulse, four clock signals, and two source voltages. The switching elements are arranged to output the four clock signals in sequence and to alternatively output the four clock signals in a reverse sequence.

Abstract translation: 驱动装置包括依次布置的多个块，每个块包括连接到接收到起始脉冲，四个时钟信号和两个源电压的第九开关元件。 开关元件被布置成依次输出四个时钟信号，并以相反的顺序输出四个时钟信号。

公开(公告)号：US20040125065A1

公开(公告)日：2004-07-01

申请号：US10421692

申请日：2003-04-24

Applicant: LG.PHILIPS LCD CO., LTD.

Inventor： Jae Deok Park ,  Seong-Gyun Kim

IPC: G09G003/36

CPC classification number: G09G3/20 ,  G09G3/3208 ,  G09G3/3648 ,  G09G2300/08 ,  G09G2310/0275 ,  G09G2310/0289 ,  G09G2310/0297

Abstract: A flat panel display device for a small module application is disclosed in the present invention. The flat display device includes a DC/DC converter supplying a DC voltage, a timing controller connected to the DC/DC converter, the timing controller outputting a gate control signal and a data control signal, a first level shifter at the circuit unit amplifying the gate control signal and the data control signal for the timing controller, a second level shifter at the display panel amplifying the gate control signal and the data control signal amplified by the first level shifter, a plurality of gate lines and data lines crossing one another, a gate driver connected to a first end of each of the gate lines, the gate driver outputting a scan signal according to the gate control signal amplified by the second level shifter, and a data driver connected to a second end of each of the data lines, the data driver outputting a gray level voltage according to the data control signal amplified by the second level shifter.

Abstract translation: 在本发明中公开了一种小型模块应用的平板显示装置。 平面显示装置包括提供DC电压的DC / DC转换器，连接到DC / DC转换器的定时控制器，输出门控制信号和数据控制信号的定时控制器，在电路单元放大第一电平移位器 门控制信号和用于定时控制器的数据控制信号，在显示面板放大第一电平移位器放大的门控制信号和数据控制信号的第二电平移位器，彼此相交的多条栅极线和数据线， 连接到每个栅极线的第一端的栅极驱动器，栅极驱动器根据由第二电平移位器放大的栅极控制信号输出扫描信号，以及数据驱动器，连接到每条数据线的第二端 数据驱动器根据由第二电平移位器放大的数据控制信号输出灰度级电压。

公开(公告)号：US20040125069A1

公开(公告)日：2004-07-01

申请号：US10422810

申请日：2003-04-25

Applicant: LG.Philips LCD Co.,Ltd.

Inventor： Jae Deok Park ,  Du Hwan Oh

IPC: G09G003/36

CPC classification number: G11C19/184 ,  G09G3/3666 ,  G09G3/3688 ,  G09G2310/0283 ,  G09G2310/0289 ,  G11C19/28

Abstract: A bi-directional driving circuit of a flat panel display device and method for driving the same is disclosed in the present invention. The bi-directional driving circuit of a flat panel display device having a plurality of blocks driven by a start pulse Vst, first to fourth clock signals having different phases CLK1, CLK2, CLK3, and CLK4, and first and second power source voltages Vdd and Vss, each block includes a shift register comprising a first control part charging the start pulse Vst or an output signal of a previous block to a first node Q according to either one of the first to fourth clock signals or a second node QB, a second control part controlling the second node QB according to the start pulse Vst, either the output signal of the previous block or an output signal of the next block, and one of the first to fourth clock signals, a third control part charging the start pulse Vst or the output signal of the next block to the first node Q according to either one of the first to fourth clock signals, or controlling the second node QB, and a buffer outputting one of the first to fourth clock signals as a shift pulse according to the first and second nodes Q and QB; and a level shifter shifting a level of the shift pulse output from the shift register in each block, and outputting the shifted level.

Abstract translation: 本发明公开了一种平板显示装置的双向驱动电路及其驱动方法。 具有由启动脉冲Vst驱动的多个块的平板显示装置的双向驱动电路，具有不同相位CLK1，CLK2，CLK3和CLK4的第一至第四时钟信号以及第一和第二电源电压Vdd和 Vss，每个块包括移位寄存器，其包括根据第一至第四时钟信号中的任一个或第二节点QB将起始脉冲Vst的起始脉冲Vst或先前块的输出信号充电至第一节点Q的第一控制部分， 根据起始脉冲Vst控制第二节点QB的控制部分，先前块的输出信号或下一个块的输出信号，以及第一至第四时钟信号中的一个;第三控制部分，对起始脉冲Vst充电 或根据第一至第四时钟信号中的任何一个的下一个块到第一节点Q的输出信号，或者控制第二节点QB，以及将第一至第四时钟信号中的一个作为移位 根据第一和第二节点Q和QB的脉冲; 并且电平移位器移位在每个块中从移位寄存器输出的移位脉冲的电平，并输出移位电平。

公开(公告)号：US20010054998A1

公开(公告)日：2001-12-27

申请号：US09880130

申请日：2001-06-14

Applicant: LG.PHILIPS LCD CO., LTD.

Inventor： Ju Chun Yeo ,  Jae Deok Park

IPC: G09G003/36

CPC classification number: G02F1/13458 ,  G02F1/1345 ,  G02F1/13452

Abstract: A liquid crystal display device that is capable of preventing metal wires from being corroded during its long-term use under the high temperature and high humidity circumference. In the device, a pad is positioned at a non-display area of a substrate to be connected to at least one of a gate line and a data line. A driving circuit responds to an electrical signal from the pad to drive a liquid crystal pixel cell provided within said non-display area of the substrate. A semiconductor pattern is opposed to the driving circuit with having the pad therebetween to be connected between the pad and the driving circuit.

Abstract translation: 一种液晶显示装置，其能够防止在高温高湿环境下长期使用时金属线被腐蚀。 在该器件中，衬垫位于衬底的非显示区域以与栅极线和数据线中的至少一个连接。 驱动电路响应来自焊盘的电信号，以驱动设置在衬底的所述非显示区域内的液晶像素单元。 半导体图案与驱动电路相对，其间具有衬垫以连接在焊盘和驱动电路之间。