Systems and methods for randomizing component mismatch in an ADC
    1.
    再颁专利
    Systems and methods for randomizing component mismatch in an ADC 有权
    随机化ADC中组件不匹配的系统和方法

    公开(公告)号:USRE45798E1

    公开(公告)日:2015-11-10

    申请号:US14473745

    申请日:2014-08-29

    CPC classification number: H04B17/102 H03M1/0673 H03M1/74

    Abstract: Circuits and methods for converting a signal from analog to digital. A random number generator provides a random number to a memory. The memory is preconfigured to include codes of predetermined digital to analog (DAC) configurations that provide the maximum amount of DAC gradient suppression. At least one Flash reference generation DAC (FRGD) has an input coupled to the memory unit and an output providing a reference voltage level for its respective Flash comparator. The Flash comparators compare the analog input signal to their respective reference voltage and provide a digital output signal based on the comparison.

    Abstract translation: 用于将信号从模拟转换成数字的电路和方法。 随机数生成器为存储器提供随机数。 存储器被预配置为包括提供DAC梯度抑制的最大量的预定数模(DAC)配置的代码。 至少一个闪存参考生成DAC(FRGD)具有耦合到存储器单元的输入和为其各自的闪存比较器提供参考电压电平的输出。 闪存比较器将模拟输入信号与其各自的参考电压进行比较,并根据比较提供数字输出信号。

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