Systems and methods for randomizing component mismatch in an ADC
    1.
    再颁专利
    Systems and methods for randomizing component mismatch in an ADC 有权
    随机化ADC中组件不匹配的系统和方法

    公开(公告)号:USRE45798E1

    公开(公告)日:2015-11-10

    申请号:US14473745

    申请日:2014-08-29

    CPC classification number: H04B17/102 H03M1/0673 H03M1/74

    Abstract: Circuits and methods for converting a signal from analog to digital. A random number generator provides a random number to a memory. The memory is preconfigured to include codes of predetermined digital to analog (DAC) configurations that provide the maximum amount of DAC gradient suppression. At least one Flash reference generation DAC (FRGD) has an input coupled to the memory unit and an output providing a reference voltage level for its respective Flash comparator. The Flash comparators compare the analog input signal to their respective reference voltage and provide a digital output signal based on the comparison.

    Abstract translation: 用于将信号从模拟转换成数字的电路和方法。 随机数生成器为存储器提供随机数。 存储器被预配置为包括提供DAC梯度抑制的最大量的预定数模(DAC)配置的代码。 至少一个闪存参考生成DAC(FRGD)具有耦合到存储器单元的输入和为其各自的闪存比较器提供参考电压电平的输出。 闪存比较器将模拟输入信号与其各自的参考电压进行比较,并根据比较提供数字输出信号。

    Bootstrap sampling circuit with accurately averaging pre-charge circuit
    2.
    发明授权
    Bootstrap sampling circuit with accurately averaging pre-charge circuit 有权
    自举采样电路,具有准确平均的预充电电路

    公开(公告)号:US09287002B2

    公开(公告)日:2016-03-15

    申请号:US14488807

    申请日:2014-09-17

    Inventor: David M. Thomas

    Abstract: A sampling circuit may include a sampling capacitance, an electronic sampling switch, and a switch controller. The electronic sampling switch may have a control input that controls whether the electronic sampling switch is in a sample state or a hold state. The electronic sampling switch may connect the sampling capacitance to an input signal while in the sample state and disconnect the sampling capacitance from the input signal while in the hold state. The switch controller may control the control input to the electronic sampling switch so as to cause the electronic sampling switch to be in the sample state during one period and the hold state during another period. While in the sample state, the switch controller may cause the impedance of the electronic sampling switch that is seen by the input signal to be substantially independent of the voltage of the input signal. The switch controller may include a pre-charge circuit that pre-charges the control input to the electronic sampling switch prior to each commencement of the sample state to approximately the average of the voltage of the input signal and the voltage on the sampling capacitance immediately prior to each commencement of the sample state. The amount of the pre-charging may be substantially independent of the voltage of the input signal.

    Abstract translation: 采样电路可以包括采样电容,电子采样开关和开关控制器。 电子采样开关可以具有控制输入,其控制电子采样开关是处于采样状态还是保持状态。 电子采样开关可以在采样状态下将采样电容连接到输入信号,并在保持状态下将采样电容与输入信号断开。 开关控制器可以控制对电子采样开关的控制输入,以使得电子采样开关在一个周期内处于采样状态,在另一周期期间处于保持状态。 在采样状态下,开关控制器可能导致由输入信号看到的电子采样开关的阻抗基本上与输入信号的电压无关。 开关控制器可以包括预充电电路,其将在采样状态的每次开始之前的电子采样开关的控制输入预充电到大约的输入信号的电压的平均值和紧接在之前的采样电容上的电压 每次开始样品状态。 预充电的量可以基本上与输入信号的电压无关。

    BOOTSTRAP SAMPLING CIRCUIT WITH ACCURATELY AVERAGING PRE-CHARGE CIRCUIT
    3.
    发明申请
    BOOTSTRAP SAMPLING CIRCUIT WITH ACCURATELY AVERAGING PRE-CHARGE CIRCUIT 有权
    具有精确平均预充电路的引导电路采样电路

    公开(公告)号:US20150270013A1

    公开(公告)日:2015-09-24

    申请号:US14488807

    申请日:2014-09-17

    Inventor: David M. Thomas

    Abstract: A sampling circuit may include a sampling capacitance, an electronic sampling switch, and a switch controller. The electronic sampling switch may have a control input that controls whether the electronic sampling switch is in a sample state or a hold state. The electronic sampling switch may connect the sampling capacitance to an input signal while in the sample state and disconnect the sampling capacitance from the input signal while in the hold state. The switch controller may control the control input to the electronic sampling switch so as to cause the electronic sampling switch to be in the sample state during one period and the hold state during another period. While in the sample state, the switch controller may cause the impedance of the electronic sampling switch that is seen by the input signal to be substantially independent of the voltage of the input signal. The switch controller may include a pre-charge circuit that pre-charges the control input to the electronic sampling switch prior to each commencement of the sample state to approximately the average of the voltage of the input signal and the voltage on the sampling capacitance immediately prior to each commencement of the sample state. The amount of the pre-charging may be substantially independent of the voltage of the input signal.

    Abstract translation: 采样电路可以包括采样电容,电子采样开关和开关控制器。 电子采样开关可以具有控制输入,其控制电子采样开关是处于采样状态还是保持状态。 电子采样开关可以在采样状态下将采样电容连接到输入信号,并在保持状态下将采样电容与输入信号断开。 开关控制器可以控制对电子采样开关的控制输入,以使得电子采样开关在一个周期内处于采样状态,在另一周期期间处于保持状态。 在采样状态下,开关控制器可能导致由输入信号看到的电子采样开关的阻抗基本上与输入信号的电压无关。 开关控制器可以包括预充电电路,其将在采样状态的每次开始之前的电子采样开关的控制输入预充电到大约的输入信号的电压的平均值和紧接在之前的采样电容上的电压 每次开始样品状态。 预充电的量可以基本上与输入信号的电压无关。

    Systems and methods for randomizing component mismatch in an ADC
    4.
    发明授权
    Systems and methods for randomizing component mismatch in an ADC 有权
    随机化ADC中组件不匹配的系统和方法

    公开(公告)号:US08648741B2

    公开(公告)日:2014-02-11

    申请号:US13671151

    申请日:2012-11-07

    Inventor: David M. Thomas

    CPC classification number: H04B17/102 H03M1/0673 H03M1/74

    Abstract: Circuits and methods for converting a signal from analog to digital. A random number generator provides a random number to a memory. The memory is preconfigured to include codes of predetermined digital to analog (DAC) configurations that provide the maximum amount of DAC gradient suppression. At least one Flash reference generation DAC (FRGD) has an input coupled to the memory unit and an output providing a reference voltage level for its respective Flash comparator. The Flash comparators compare the analog input signal to their respective reference voltage and provide a digital output signal based on the comparison.

    Abstract translation: 用于将信号从模拟转换成数字的电路和方法。 随机数生成器为存储器提供随机数。 存储器被预配置为包括提供DAC梯度抑制的最大量的预定数模(DAC)配置的代码。 至少一个闪存参考生成DAC(FRGD)具有耦合到存储器单元的输入和为其各自的闪存比较器提供参考电压电平的输出。 闪存比较器将模拟输入信号与其各自的参考电压进行比较,并根据比较提供数字输出信号。

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