公开(公告)号：US08760200B2

公开(公告)日：2014-06-24

申请号：US13857056

申请日：2013-04-04

Applicant: LSIS Co., Ltd.

Inventor： Jae Seok Choung ,  Gyoung Hun Nam ,  Sung Hee Kang ,  Jong Bae Kim

IPC: H03B1/00 ,  H03K3/00

CPC classification number: H03K17/161 ,  H03K17/04123 ,  H03K17/06 ,  H03K19/01721

Abstract: A gate driving apparatus according to the embodiment includes a first switching device, a second switching device that outputs a signal to charge a capacitance of the first switching device, a third switching device connected in parallel to the second switching device to prevent a drop of a voltage output from the second switching device, and a fourth switching device that outputs a signal to discharge the capacitance of the first switching device. An NMOS transistor is used as a main switching device and a PMOS transistor connected in parallel to the NMOS transistor is used as a sub-switching device, so that the chip size is reduced without dropping the output voltage of the gate driving apparatus. The loss of the switching device is prevented by preventing the output voltage of the gate driving apparatus from being dropped.

Abstract translation: 根据实施例的门驱动装置包括第一开关装置，输出用于对第一开关装置的电容充电的信号的第二开关装置，与第二开关装置并联连接的第三开关装置，以防止第 从第二开关装置输出的电压;以及第四开关装置，其输出用于放电第一开关装置的电容的信号。 使用NMOS晶体管作为主开关器件，并且将与NMOS晶体管并联连接的PMOS晶体管用作子开关器件，从而在不降低栅极驱动器件的输出电压的情况下降低芯片尺寸。 通过防止栅极驱动装置的输出电压下降来防止开关装置的损耗。