公开(公告)号：US20240178848A1

公开(公告)日：2024-05-30

申请号：US18518733

申请日：2023-11-24

申请人： LX SEMICON CO., LTD.

发明人： Jae Hwan LEE ,  Yoon Hoe KIM ,  Ji Hye KIM ,  Seung Chan JUNG ,  Hyun Soo CHUNG

IPC分类号： H03L7/083 ,  H03L7/093 ,  H03L7/107

CPC分类号： H03L7/083 ,  H03L7/093 ,  H03L7/1077

摘要： The present disclosure relates to a multi-chip clock synchronization device and a method capable of reducing an operating frequency and power consumption when a plurality of chips share clocks for multi-chip clock synchronization, which may include a reference clock supply unit connected to a plurality of chips and supplying a reference clock of a first frequency to each chip and a target clock generation unit generating a target clock of a second frequency based on the reference clock of the first frequency, wherein the reference clock supply unit may generate the reference clock of the first frequency which is N times lower than the second frequency of the target clock to supply the generated reference clock to each chip, and the target clock generation unit may multiply the first frequency of the reference clock by N times when the reference clock of the first frequency is input to generate the target clock of the second frequency.