Secure pipeline manager
    1.
    发明授权
    Secure pipeline manager 有权
    安全管道管理员

    公开(公告)号:US08429426B2

    公开(公告)日:2013-04-23

    申请号:US12253414

    申请日:2008-10-17

    IPC分类号: G06F12/14

    CPC分类号: G06F21/85 G06F21/72

    摘要: A method for data storage includes supplying data to and from a host to a storage memory via a secure data path. A first CPU is employed to control operation of the storage memory, and a second CPU is employed to control operation of the secure data path.

    摘要翻译: 一种用于数据存储的方法包括经由安全数据路径向主机提供数据和从主机向存储存储器提供数据。 采用第一CPU来控制存储存储器的操作,并且采用第二CPU来控制安全数据路径的操作。

    SECURE PIPELINE MANAGER
    2.
    发明申请
    SECURE PIPELINE MANAGER 有权
    安全管道经理

    公开(公告)号:US20090113146A1

    公开(公告)日:2009-04-30

    申请号:US12253414

    申请日:2008-10-17

    IPC分类号: G06F13/00

    CPC分类号: G06F21/85 G06F21/72

    摘要: A method for data storage includes supplying data to and from a host to a storage memory via a secure data path. A first CPU is employed to control operation of the storage memory, and a second CPU is employed to control operation of the secure data path.

    摘要翻译: 一种用于数据存储的方法包括经由安全数据路径向主机提供数据和从主机向存储存储器提供数据。 采用第一CPU来控制存储存储器的操作,并且采用第二CPU来控制安全数据路径的操作。

    SECURE DATA PROCESSING FOR UNALIGNED DATA
    3.
    发明申请
    SECURE DATA PROCESSING FOR UNALIGNED DATA 有权
    安全数据处理用于输入数据

    公开(公告)号:US20090113218A1

    公开(公告)日:2009-04-30

    申请号:US12258626

    申请日:2008-10-27

    IPC分类号: H04L9/06

    摘要: A method for data cryptography includes accepting input data, which contains a section that is to undergo a cryptographic operation and starts at an offset with respect to a beginning of the input data, by a Direct Memory Access (DMA) module. The input data is aligned by the DMA module to cancel out the offset. The aligned input data is read out of the DMA module, and the cryptographic operation is performed on the section.

    摘要翻译: 一种用于数据加密的方法包括:接受直接存储器访问(DMA)模块的输入数据,该输入数据包含要进行密码操作并且相对于输入数据的开始以偏移开始的部分。 输入数据由DMA模块对齐,以抵消偏移量。 从DMA模块中读取对齐的输入数据,并对该部分执行加密操作。

    Configurable random number generator
    4.
    发明授权
    Configurable random number generator 有权
    可配置随机数发生器

    公开(公告)号:US08130950B2

    公开(公告)日:2012-03-06

    申请号:US12260629

    申请日:2008-10-29

    IPC分类号: H04L9/00

    CPC分类号: G06F7/588 G06F7/58 H04L9/0861

    摘要: A method for random number generation includes generating random number sequences using a Random Number 5 Generator (RNG) circuit having an externally-modifiable configuration. The RNG circuit generates a first random number sequence having a first measure of randomness, and modifies the configuration of the RNG circuit, causing the RNG circuit to generate a second random number sequence having a second measure of the randomness, indicating a degree of the randomness that is no less than the first measure.

    摘要翻译: 用于随机数生成的方法包括使用具有外部可修改配置的随机数5生成器(RNG)电路来生成随机数序列。 RNG电路产生具有第一测量随机性的第一随机数序列,并且修改RNG电路的配置,导致RNG电路产生具有随机性的第二测量的第二随机数序列,指示随机性的程度 这不过是第一个措施。

    Secure data processing for unaligned data
    5.
    发明授权
    Secure data processing for unaligned data 有权
    针对未对齐数据的安全数据处理

    公开(公告)号:US08918650B2

    公开(公告)日:2014-12-23

    申请号:US12258626

    申请日:2008-10-27

    摘要: A method for data cryptography includes accepting input data, which contains a section that is to undergo a cryptographic operation and starts at an offset with respect to a beginning of the input data, by a Direct Memory Access (DMA) module. The input data is aligned by the DMA module to cancel out the offset. The aligned input data is read out of the DMA module, and the cryptographic operation is performed on the section.

    摘要翻译: 一种用于数据加密的方法包括:接受直接存储器访问(DMA)模块的输入数据,该输入数据包含要进行密码操作并且相对于输入数据的开始以偏移开始的部分。 输入数据由DMA模块对齐,以抵消偏移量。 从DMA模块中读取对齐的输入数据,并对该部分执行加密操作。

    CONFIGURABLE RANDOM NUMBER GENERATOR
    6.
    发明申请
    CONFIGURABLE RANDOM NUMBER GENERATOR 有权
    可配置随机数发生器

    公开(公告)号:US20090110188A1

    公开(公告)日:2009-04-30

    申请号:US12260629

    申请日:2008-10-29

    IPC分类号: H04L9/28 G06F7/58

    CPC分类号: G06F7/588 G06F7/58 H04L9/0861

    摘要: A method for random number generation includes generating random number sequences using a Random Number Generator (RNG) circuit having an externally-modifiable configuration. The RNG circuit generates a first random number sequence having a first measure of randomness, and modifies the configuration of the RNG circuit, causing the RNG circuit to generate a second random number sequence having a second measure of the randomness, indicating a degree of the randomness that is no less than the first measure.

    摘要翻译: 用于随机数生成的方法包括使用具有外部可修改配置的随机数生成器(RNG)电路来生成随机数序列。 RNG电路产生具有第一测量随机性的第一随机数序列,并且修改RNG电路的配置,导致RNG电路产生具有随机性的第二测量的第二随机数序列,指示随机性的程度 这不过是第一个措施。

    Accelerated throughput synchronized word stream cipher, message authenticator and zero-knowledge output random number generator
    7.
    发明授权
    Accelerated throughput synchronized word stream cipher, message authenticator and zero-knowledge output random number generator 有权
    加速吞吐量同步字流密码,消息认证器和零知识输出随机数发生器

    公开(公告)号:US07827223B2

    公开(公告)日:2010-11-02

    申请号:US11578909

    申请日:2005-04-21

    IPC分类号: G06F7/58 H04L9/00

    摘要: Systems and methods are disclosed, especially designed for very compact hardware implementations, to generate random number strings with a high level of entropy at maximum speed. For immediate deployment of software implementations, certain permutations have been introduced to maintain the same level of unpredictability which is more amenable to hi-level software programming, with a small time loss on hardware execution; typically when hardware devices communicate with software implementations. Particular attention has been paid to maintain maximum correlation immunity, and to maximize non-linearity of the output sequence. Good stream ciphers are based on random generators which have a large number of secured internal binary variables, which lead to the page synchronized stream ciphering. The method for parsed page synchronization which is presented is especially valuable for Internet applications, where occasionally frame sequences are often mixed. The large number of internal variables with fast diffusion of individual bits wherein the masked message is fed back into the machine variables is potentially ideal for message authentication procedures.

    摘要翻译: 公开了特别设计用于非常紧凑的硬件实现的系统和方法,以最大速度产生具有高水平熵的随机数字串。 为了立即部署软件实现,已经引入了某些排列以保持相同级别的不可预测性,这更适合于高级软件编程,硬件执行时间较短; 通常当硬件设备与软件实现通信时。 已经特别注意保持最大相关免疫力,并使输出序列的非线性最大化。 良好的流密码基于具有大量安全内部二进制变量的随机生成器,这导致页面同步流加密。 所呈现的用于解析页面同步的方法对于互联网应用是特别有价值的,其中偶尔帧序列通常是混合的。 具有快速扩散的单个位的大量内部变量,其中掩蔽的消息被反馈到机器变量中对于消息认证过程是潜在的理想的。

    Accelerated Throughtput Synchronized Word Stream Cipher, Message Authenticator and Zero-Knowledge Output Random Number Generator
    8.
    发明申请
    Accelerated Throughtput Synchronized Word Stream Cipher, Message Authenticator and Zero-Knowledge Output Random Number Generator 有权
    加速吞吐量同步字流密码,消息认证器和零知识输出随机数生成器

    公开(公告)号:US20070244951A1

    公开(公告)日:2007-10-18

    申请号:US11578909

    申请日:2007-02-21

    IPC分类号: G06F7/58

    摘要: Systems and methods are disclosed, especially designed for very compact hardware implementations, to generate random number strings with a high level of entropy at maximum speed. For immediate deployment of software implementations, certain permutations have been introduced to maintain the same level of unpredictability which is more amenable to hi-level software programming, with a small time loss on hardware execution; typically when hardware devices communicate with software implementations. Particular attention has been paid to maintain maximum correlation immunity, and to maximize non-linearity of the output sequence. Good stream ciphers are based on random generators which have a large number of secured internal binary variables, which lead to the page synchronized stream ciphering. The method for parsed page synchronization which is presented is especially valuable for Internet applications, where occasionally frame sequences are often mixed. The large number of internal variables with fast diffusion of individual bits wherein the masked message is fed back into the machine variables is potentially ideal for message authentication procedures.

    摘要翻译: 公开了特别设计用于非常紧凑的硬件实现的系统和方法,以最大速度产生具有高水平熵的随机数字串。 为了立即部署软件实现,已经引入了某些排列以保持相同级别的不可预测性,这更适合于高级软件编程,硬件执行时间较短; 通常当硬件设备与软件实现通信时。 已经特别注意保持最大相关免疫力,并使输出序列的非线性最大化。 良好的流密码基于具有大量安全内部二进制变量的随机生成器,这导致页面同步流加密。 所呈现的用于解析页面同步的方法对于互联网应用是特别有价值的,其中偶尔帧序列通常是混合的。 具有快速扩散的单个位的大量内部变量,其中掩蔽的消息被反馈到机器变量中对于消息认证过程是潜在的理想的。