Imaging device and signal processing method
    1.
    发明授权
    Imaging device and signal processing method 失效
    成像装置和信号处理方法

    公开(公告)号:US08471936B2

    公开(公告)日:2013-06-25

    申请号:US12303797

    申请日:2007-06-01

    摘要: The present invention provides an imaging device that generates, for each of a red color, a green color, and a blue color, an image signal having pixels arranged adjacent to each other in a two-dimensional array, including a red color imaging element that senses incident light to output a red color signal (20R) having pixels arranged in a check pattern, a green color imaging element that senses the incident light to output a green color signal (20G) having pixels arranged in a check pattern, a blue color imaging element that senses the incident light to output a blue color signal (20B) having pixels arranged in a check pattern, interpolation means for interpolating a blank pixel using neighboring pixels, and correlation means for determining a correlation of the neighboring pixels of the blank pixel, wherein the correlation means determines a correlation for each of the red color signal, the green color signal, and the blue color signal on the basis of at least one color signal of the red color signal, the green color signal, and the blue color signal, and wherein the interpolation means interpolates the blank pixel for each of the red color signal, the green color signal, and the blue color signal on the basis of the correlation to generate an imaging signal.

    摘要翻译: 本发明提供了一种成像装置,其针对红色,绿色和蓝色中的每一者生成具有以二维阵列彼此相邻布置的像素的图像信号,所述二维阵列包括红色成像元件,所述红色成像元件 感测入射光以输出具有布置在检查图案中的像素的红色信号(20R);感测入射光的绿色成像元件,以输出具有布置在检查图案中的像素的绿色信号(20G),蓝色 感测入射光以输出具有以检查图案排列的像素的蓝色信号(20B)的成像元件,用于使用相邻像素内插空白像素的内插装置,以及用于确定空白像素的相邻像素的相关性的相关装置 其中所述相关装置基于所述红色信号,所述绿色信号和所述蓝色信号中的至少一个颜色信号来确定每个所述红色信号, 红色信号,绿色信号和蓝色信号,并且其中插值装置基于相关性来内插红色信号,绿色信号和蓝色信号中的每一个的空白像素以产生 成像信号。

    Universal self-locking anatomical plate for posterior of acetabulum and pelvis

    公开(公告)号:US10420595B2

    公开(公告)日:2019-09-24

    申请号:US14925706

    申请日:2015-10-28

    申请人: Li Ming

    发明人: Li Ming

    IPC分类号: A61B17/80 A61B17/17

    摘要: A universal self-locking anatomical plate for posterior of acetabulum and pelvis, which includes a right plate (1), a plurality of screws (2) and a guiding sleeve (3). The right plate (1) includes a region-a, a region-b, a region-c, a region-d and a region-e, which can respectively fix a certain region of an acetabulum, the region-a is provided thereon with three first locking holes for receiving the locking screws, the region-b is provided thereon with at least two second locking holes, the region-c is provided thereon with two positioning holes and twelve third locking holes, the region-d is provided thereon with three fourth locking holes, and the region-e is provided thereon with one fifth locking hole. The plate has an optimized structure, and has three capabilities: good safety, good stability, and biomechanic matching. Additionally, the fitness of the plate to the surface of the acetabulum mode is good.

    HIGH VOLTAGE VALVE GROUP WITH INCREASED BREAKDOWN STRENGTH
    3.
    发明申请
    HIGH VOLTAGE VALVE GROUP WITH INCREASED BREAKDOWN STRENGTH 审中-公开
    高压阀组具有提高的断裂强度

    公开(公告)号:US20090266605A1

    公开(公告)日:2009-10-29

    申请号:US12305999

    申请日:2006-06-20

    申请人: Li Ming Dong Wu

    发明人: Li Ming Dong Wu

    IPC分类号: H02B1/06

    CPC分类号: H02J3/36 H05K7/1432 Y02E60/60

    摘要: A high voltage assembly including a valve group and a shield connected to the valve group. A resistor is connected between the shield and the valve group The assembly provides an increased breakdown strength and DC withstand level.

    摘要翻译: 包括阀组和与阀组连接的屏蔽的高压组件。 电阻器连接在屏蔽和阀组之间。组件提供了增加的击穿强度和直流耐受水平。

    Methods of fabricating devices including source/drain region with abrupt junction profile
    4.
    发明授权
    Methods of fabricating devices including source/drain region with abrupt junction profile 有权
    制造器件的方法包括具有突变结型材的源极/漏极区域

    公开(公告)号:US08679910B2

    公开(公告)日:2014-03-25

    申请号:US13218547

    申请日:2011-08-26

    IPC分类号: H01L21/00

    摘要: Provided are methods of fabricating a semiconductor device including a metal oxide semiconductor (MOS) transistor. The methods include forming a gate pattern on a semiconductor substrate. The semiconductor substrate is etched using the gate pattern as an etching mask to form a pair of active trenches spaced apart from each other in the semiconductor substrate. Epitaxial layers are formed in the active trenches, respectively. The respective epitaxial layers are formed by sequentially stacking first and second layers. The first and second layers are formed of a semiconductor layer having a lattice constant greater than the semiconductor substrate, and a composition ratio of the second layer is different from that of the first layer. Semiconductor devices having the first and second layers are also provided.

    摘要翻译: 提供制造包括金属氧化物半导体(MOS)晶体管的半导体器件的方法。 所述方法包括在半导体衬底上形成栅极图案。 使用栅极图案作为蚀刻掩模蚀刻半导体衬底,以在半导体衬底中形成彼此间隔开的一对有源沟槽。 分别在有源沟槽中形成外延层。 通过依次层叠第一层和第二层形成各个外延层。 第一层和第二层由具有大于半导体衬底的晶格常数的半导体层形成,并且第二层的组成比不同于第一层的组成比。 还提供具有第一和第二层的半导体器件。

    Power transformer/inductor
    5.
    发明授权
    Power transformer/inductor 失效
    电力变压器/电感器

    公开(公告)号:US06970063B1

    公开(公告)日:2005-11-29

    申请号:US09355801

    申请日:1998-02-02

    IPC分类号: H01F27/34 H01F27/28

    CPC分类号: H01F27/288 H01F27/2828

    摘要: The present invention relates to a power transformer/inductor comprising at least one winding. The windings are designed by means of a high-voltage cable, comprising an electric conductor, and around the conductor there is arranged a first semiconducting layer, around the first semiconducting layer there is arranged an insulating layer and around the insulating layer there is arranged a second semiconducting layer. The second semiconducting layer is earthed at or in the vicinity of both ends (261, 262; 281, 282) of each winding and furthermore one point between both ends (261, 262; 281, 282) is directly earthed.

    摘要翻译: 本发明涉及一种包括至少一个绕组的电力变压器/电感器。 绕组是通过包括电导体的高压电缆设计的,并且围绕导体布置有第一半导电层,围绕第一半导体层布置有绝缘层,并且围绕绝缘层布置有 第二半导体层。 第二半导体层在两端(26,21,26,28,28,23,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28 每个绕组的另一个点以及两端之间的一个点(26 1,2 2, 2 )直接接地。

    Electrode for field control
    7.
    发明授权
    Electrode for field control 失效
    电场用于现场控制

    公开(公告)号:US06432524B1

    公开(公告)日:2002-08-13

    申请号:US09297739

    申请日:1999-07-09

    IPC分类号: B32B300

    摘要: An electrode for control of an electric field strength in a gaseous electrically insulating medium at the surface of the electrode and in the vicinity of the electrode, comprising an electrically conducting inner electrode (1′) and an electrically non-conducting layer (8) on at least parts of the surface of the inner electrode, wherein the thickness of the non-conducting layer is at least 5% of the mean diameter of the inner electrode and that the relative dielectric constant of the non-conducting layer is smaller than 3.

    摘要翻译: 一种用于控制在电极表面和电极周围的气体电绝缘介质中的电场强度的电极,包括导电内电极(1')和不导电层(8)上的导电内电极 所述内部电极的表面的至少一部分,其中所述非导电层的厚度为所述内部电极的平均直径的至少5%,并且所述非导电层的相对介电常数小于3。

    Methods of Fabricating Devices Including Source/Drain Region with Abrupt Junction Profile
    8.
    发明申请
    Methods of Fabricating Devices Including Source/Drain Region with Abrupt Junction Profile 有权
    制造包括具有突变接头型材的源/排放区域的设备的方法

    公开(公告)号:US20120088342A1

    公开(公告)日:2012-04-12

    申请号:US13218547

    申请日:2011-08-26

    IPC分类号: H01L21/8238 H01L21/336

    摘要: Provided are methods of fabricating a semiconductor device including a metal oxide semiconductor (MOS) transistor. The methods include forming a gate pattern on a semiconductor substrate. The semiconductor substrate is etched using the gate pattern as an etching mask to form a pair of active trenches spaced apart from each other in the semiconductor substrate. Epitaxial layers are formed in the active trenches, respectively. The respective epitaxial layers are formed by sequentially stacking first and second layers. The first and second layers are formed of a semiconductor layer having a lattice constant greater than the semiconductor substrate, and a composition ratio of the second layer is different from that of the first layer. Semiconductor devices having the first and second layers are also provided.

    摘要翻译: 提供制造包括金属氧化物半导体(MOS)晶体管的半导体器件的方法。 所述方法包括在半导体衬底上形成栅极图案。 使用栅极图案蚀刻半导体衬底作为蚀刻掩模,以在半导体衬底中形成彼此间隔开的一对有源沟槽。 分别在有源沟槽中形成外延层。 通过依次层叠第一层和第二层形成各个外延层。 第一层和第二层由具有大于半导体衬底的晶格常数的半导体层形成,并且第二层的组成比不同于第一层的组成比。 还提供具有第一和第二层的半导体器件。

    Power transformer/inductor
    9.
    发明授权
    Power transformer/inductor 失效
    电力变压器/电感器

    公开(公告)号:US07046492B2

    公开(公告)日:2006-05-16

    申请号:US11014804

    申请日:2004-12-20

    IPC分类号: H02H7/04

    摘要: A power transformer/inductor includes at least one winding. The winding is made of a high voltage cable that includes an electric conductor, and around the electric conductor is arranged a first semiconducting layer, around the first semiconducting layer is an insulating layer, and around the insulating layer is a second semiconducting layer. The second semiconducting layer is directly earthed at both ends of the winding and furthermore at least at two points per turn of every winding such that one or more points are indirectly earthed.

    摘要翻译: 电力变压器/电感器包括至少一个绕组。 绕组由包括电导体的高压电缆制成,并且围绕电导体布置有第一半导体层,围绕第一半导体层是绝缘层,并且绝缘层周围是第二半导体层。 第二半导电层在绕组的两端处直接接地,此外至少在每个绕组的每匝两点处,使得一个或多个点被间接接地。

    Power transformer/inductor
    10.
    发明申请
    Power transformer/inductor 失效
    电力变压器/电感器

    公开(公告)号:US20050099258A1

    公开(公告)日:2005-05-12

    申请号:US11014804

    申请日:2004-12-20

    IPC分类号: H01F27/34 H01F27/28

    摘要: A power transformer/inductor includes at least one winding. The winding is made of a high voltage cable that includes an electric conductor, and around the electric conductor is arranged a first semiconducting layer, around the first semiconducting layer is an insulating layer, and around the insulating layer is a second semiconducting layer. The second semiconducting layer is directly earthed at both ends of the winding and furthermore at least at two points per turn of every winding such that one or more points are indirectly earthed.

    摘要翻译: 电力变压器/电感器包括至少一个绕组。 绕组由包括电导体的高压电缆制成,并且围绕电导体布置有第一半导体层,围绕第一半导体层是绝缘层,并且绝缘层周围是第二半导体层。 第二半导电层在绕组的两端处直接接地,此外至少在每个绕组的每匝两点处,使得一个或多个点被间接接地。