摘要:
A ballast circuit including a power factor correction circuit with an alterable d.c. bus charging rate is provided. The power factor correction circuit selectively alters the d.c. bus charging rate such that, during a startup period for the ballast circuit, the charging rate is faster than during a steady-state period. The ballast circuit including a bridge rectifier, a power factor correction circuit, a bus capacitor, and at least one inverter. The power factor correction circuit including a power factor controller, a semiconductor switch operationally coupled to an output signal of the power factor controller, a selectively alterable impedance network operationally coupled to an output of the semiconductor switch and operationally coupled to an input signal of the power factor controller, and an impedance network control circuit operationally coupled to the impedance network to selectively alter the impedance network.
摘要:
A ballast circuit is provided, comprising: a plurality of inverters, each inverter for powering a load; and a controller operationally coupled to a shutdown control signal of each inverter for selectively shutting down any combination of inverters. In another aspect, the controller is for selectively disabling any combination of inverters to effectively disconnect the load associated with each disabled inverter. The controller is for receiving communications from a control device, each communication a selection of 0%, “n−1” approximate percentages each associated with a ratio of “1” through “n−1” loads to “n” loads, where “n” is the total number of loads powered by the inverters of the ballast circuit and where the numerator for each ratio is an integer between “1” and “n−1,” inclusive, or 100% light from the combined loads powered by the inverters of the ballast circuit.
摘要:
Prior to a load being activated, a first capacitive network and the load are operationally in parallel with each other, and the first capacitive network and a first inductor are in series with each other. A second inductor is magnetically coupled to the first inductor to boost a voltage supplied to the load. When the load is activated, a second capacitive network, the load, and the first inductor are operationally in series with each other. In a further embodiment, the first inductor and a second inductor are not capacitively coupled together, rather the second inductor generates lagging current at a first node to cancel leading current generated by the first capacitive network. Heating of the load is accomplished by the use of a cathode heater winding in operational connection with at least one of the cathodes.