公开(公告)号：US11742000B2

公开(公告)日：2023-08-29

申请号：US17521894

申请日：2021-11-09

申请人： M31 TECHNOLOGY CORPORATION

发明人： Nan-Chun Lien ,  Li-Wei Chu ,  Ting-Wei Chang

IPC分类号： G11C5/02 ,  G11C7/10

CPC分类号： G11C5/025 ,  G11C7/1057 ,  G11C7/1084

摘要： A circuit module with improved line load, may comprise a first line, a first switch, a second line, a second switch and a second driver. The first switch may be on and off to conduct and stop conducting between the first line and a first node. The second switch may be on and off to conduct and stop conducting between the second line and the first node. The second driver, coupled to the second line, may be enabled to drive the second line according to a voltage of a second node, and may be disabled to stop driving the second line. The voltage of the second node may be controlled by a voltage of the first node. When the first switch is on, the second switch may be off. When the second switch is off, the second driver may be enabled.

公开(公告)号：US09378808B2

公开(公告)日：2016-06-28

申请号：US14603818

申请日：2015-01-23

申请人： M31 Technology Corporation

发明人： Nan-Chun Lien ,  Chen-Wei Lin ,  Chao-Kuei Chung ,  Li-Wei Chu ,  Yuh-Jiun Lin ,  Yu-Wei Yeh ,  Wei-Chiang Shih

IPC分类号： G11C11/419

CPC分类号： G11C11/419 ,  G11C8/16 ,  G11C11/418

摘要： A pulse width modulation device for use in an N-ports random access memory having a plurality of word line sets, wherein a specified word line set comprises N port word lines. The pulse width modulation device comprises a status detecting device and a clock signal generator. The status detecting device is coupled to the N port word lines having a first and a second port word line, and outputs a first control signal when both the voltage values of the first and second port word lines are within a first level range. The clock signal generator is coupled to the status detecting device and the specified word line set, and generates and outputs a first clock signal to the specified word line set, wherein a duration of the first clock signal kept within the first level range is variable in response to the first control signal.

摘要翻译： 一种在具有多个字线组的N端口随机存取存储器中使用的脉冲宽度调制装置，其中指定的字线组包括N个端口字线。 脉宽调制装置包括状态检测装置和时钟信号发生器。 状态检测装置与具有第一和第二端口字线的N个端口字线耦合，并且当第一和第二端口字线的电压值都在第一电平范围内时，输出第一控制信号。 时钟信号发生器耦合到状态检测装置和指定字线组，并且产生并输出到指定字线组的第一时钟信号，其中保持在第一电平范围内的第一时钟信号的持续时间是可变的 响应于第一控制信号。

公开(公告)号：US09336865B1

公开(公告)日：2016-05-10

申请号：US14827719

申请日：2015-08-17

申请人： M31 TECHNOLOGY CORPORATION

发明人： Li-Wei Chu ,  Nan-Chun Lien

IPC分类号： G11C8/00 ,  G11C7/00 ,  G11C11/419

CPC分类号： G11C11/419 ,  G11C8/16 ,  G11C11/413 ,  G11C11/417 ,  G11C11/418

摘要： A multi-port SRAM module includes a cell array comprising a plurality of cells, each having a first port and a second port; a first word line which is coupled to a plurality of cells of a target row to open and close the first port; a second word line which is coupled to the cells of the target row to open and close the second port; and a switch, which is coupled to the first word line and the second word line and couples the second word line to a reference voltage level according to a voltage level of the first word line.

摘要翻译： 多端口SRAM模块包括具有多个单元的单元阵列，每个单元具有第一端口和第二端口; 第一字线，其耦合到目标行的多个单元，以打开和关闭第一端口; 第二字线，其耦合到所述目标行的单元以打开和关闭所述第二端口; 以及开关，其耦合到所述第一字线和所述第二字线，并且根据所述第一字线的电压电平将所述第二字线耦合到参考电压电平。