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公开(公告)号:US20240363742A1
公开(公告)日:2024-10-31
申请号:US18309320
申请日:2023-04-28
发明人: Debdas Pal , Parshant Kumar , Stephen Bilotta , Timothy E. Boles
IPC分类号: H01L29/737 , H01L29/06
CPC分类号: H01L29/737 , H01L29/0619
摘要: The reduction of feedback capacitance in active semiconductor devices, such as the reduction in collector to base capacitance in transistors, is described. In one example, a transistor includes a substrate, an active region of the transistor in the substrate, a dielectric layer over a top surface of the substrate, and an interconnect region. The active region includes a base contact over the active region. The interconnect region includes a conductive interconnect that extends over the dielectric layer and is electrically coupled with the base contact. The interconnect region also includes a semiconductor junction region extending under the conductive interconnect in an area of the substrate outside of the active region. The addition of the semiconductor junction region under the conductive interconnect reduces the total collector to base capacitance in the transistor.