公开(公告)号：US20130173890A1

公开(公告)日：2013-07-04

申请号：US13779457

申请日：2013-02-27

Applicant: MAXELER TECHNOLOGIES LTD.

Inventor： James HUGGETT ,  Jacob Alexis BOWER ,  Oliver PELL

IPC: G06F9/30

CPC classification number: G06F9/30079 ,  G06F17/5054

Abstract: A method of generating a hardware design for a stream processor. The method includes defining a graph representing a processing operation designating processes to be implemented in hardware as part of the stream processor. The graph represents the processing operation in the time domain as a function of clock cycles and includes at least one data path. At least one stream offset object is provided located at a particular point in the data path. The stream offset object is operable to access, for a particular clock cycle and for the particular point in the data path, data values from a clock cycle different from the particular clock cycle

Abstract translation: 一种为流处理器生成硬件设计的方法。 该方法包括定义表示处理操作的图，其指定要在硬件中实现的流程，作为流处理器的一部分。 该图表示时域中的处理操作，作为时钟周期的函数，并且包括至少一个数据路径。 提供位于数据路径中的特定点处的至少一个流偏移对象。 流偏移对象可操作用于访问特定时钟周期和数据路径中的特定点，来自不同于特定时钟周期的时钟周期的数据值