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公开(公告)号:US10541328B2
公开(公告)日:2020-01-21
申请号:US16225077
申请日:2018-12-19
Applicant: MEDIATEK INC.
Inventor: Cheng-Hua Lin , Yan-Liang Ji , Chih-Wen Hsiung
IPC: H01L29/00 , H01L29/78 , H01L29/40 , H01L27/06 , H01L49/02 , H01L29/06 , H01L29/10 , H01L29/423 , H01L29/66
Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type, a first well region formed in a portion of the semiconductor substrate, having a second conductivity type that is the opposite of the first conductivity type. A second well region is formed in a portion of the first well region, having the first conductivity type. A first gate structure is formed over a portion of the second well region and a portion of the first well region. A first doped region is formed in a portion of the second well region. A second doped region is formed in a portion of the first well region, having the second conductivity type. A second dielectric layer is formed over a portion of the first gate structure, a portion of the first well region, and a portion of the second doped region.
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公开(公告)号:US10199496B2
公开(公告)日:2019-02-05
申请号:US15411099
申请日:2017-01-20
Applicant: MEDIATEK INC.
Inventor: Cheng-Hua Lin , Yan-Liang Ji , Chih-Wen Hsiung
Abstract: A semiconductor device capable of high-voltage operation includes a semiconductor substrate, a first well region, a second well region, a first gate structure, a first doped region, a second doped region, and a second gate structure. The first well region is formed in a portion of the semiconductor substrate. The second well region is formed in a portion of the first well region. The first gate structure is formed over a portion of the second well region and a portion of the first well region. The first doped region is formed in a portion of the second well region. The second doped region is formed in a portion of the first well region. The second gate structure is formed over a portion of the first gate structure, a portion of the first well region, and a portion of the second doped region.
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