公开(公告)号：US09899920B2

公开(公告)日：2018-02-20

申请号：US15172120

申请日：2016-06-02

Applicant: MEDIATEK INC.

Inventor： Chien-Wei Kuan ,  Yen-Hsun Hsu ,  Shan-Fong Hong ,  Chih-Chen Li ,  Yu-Te Chao

IPC: G05F1/00 ,  G05F1/573 ,  H02M3/158 ,  H02M1/14 ,  H02M1/08 ,  H02M1/00

CPC classification number: H02M3/158 ,  H02M1/08 ,  H02M1/14 ,  H02M3/1584 ,  H02M2001/0009 ,  H02M2001/0032 ,  H02M2001/0048 ,  H02M2003/1586 ,  Y02B70/1491 ,  Y02B70/16

Abstract: A voltage regulator includes a plurality of output stages and a controller. The plurality of output stages are arranged for selectively enabling to generate output voltages and output currents or not according to a plurality of control signals, respectively. The controller is arranged for sensing the output currents of the output stages, and generating the control signals according to the sensed output currents. When the controller generates the control signals to reduce a quantity of the enabled output stages, the controller determines whether a summation of the sensed output currents is greater than a first threshold or not to determine whether to enable more output stages, then a period of time later, the controller selectively determines whether the summation of the sensed output currents is greater than a second threshold or not to determine whether to enable more output stages, wherein the second threshold is lower than the first threshold.

公开(公告)号：US20170077811A1

公开(公告)日：2017-03-16

申请号：US15172120

申请日：2016-06-02

Applicant: MEDIATEK INC.

Inventor： Chien-Wei Kuan ,  Yen-Hsun Hsu ,  Shan-Fong Hong ,  Chih-Chen Li ,  Yu-Te Chao

IPC: H02M3/158 ,  H02M1/08

CPC classification number: H02M3/158 ,  H02M1/08 ,  H02M1/14 ,  H02M3/1584 ,  H02M2001/0009 ,  H02M2001/0032 ,  H02M2001/0048 ,  H02M2003/1586 ,  Y02B70/1491 ,  Y02B70/16

Abstract: A voltage regulator includes a plurality of output stages and a controller. The plurality of output stages are arranged for selectively enabling to generate output voltages and output currents or not according to a plurality of control signals, respectively. The controller is arranged for sensing the output currents of the output stages, and generating the control signals according to the sensed output currents. When the controller generates the control signals to reduce a quantity of the enabled output stages, the controller determines whether a summation of the sensed output currents is greater than a first threshold or not to determine whether to enable more output stages, then a period of time later, the controller selectively determines whether the summation of the sensed output currents is greater than a second threshold or not to determine whether to enable more output stages, wherein the second threshold is lower than the first threshold.

Abstract translation: 电压调节器包括多个输出级和控制器。 多个输出级被布置用于分别根据多个控制信号选择性地产生输出电压和输出电流。 控制器被布置用于感测输出级的输出电流，并根据感测的输出电流产生控制信号。 当控制器产生控制信号以减少使能的输出级的数量时，控制器确定所感测的输出电流的总和是否大于第一阈值，以确定是否启用更多的输出级，然后是一段时间 之后，控制器选择性地确定所感测的输出电流的总和是否大于第二阈值，以确定是否启用更多输出级，其中第二阈值低于第一阈值。

公开(公告)号：US10784763B2

公开(公告)日：2020-09-22

申请号：US15912396

申请日：2018-03-05

Applicant: MediaTek Inc.

Inventor： Kuan-Yu Chu ,  HuaChiang Huang ,  Chih-Chen Li ,  Shan-Fong Hong

IPC: H02M1/08 ,  H02M3/158 ,  H02M1/00

Abstract: An inverter circuit may include an inverter, a driver coupled to the inverter, and a slew rate control module configured to modify a slew rate of the driver. The slew rate may be modified based on a magnitude of a load driven by the inverter circuit. The magnitude of the load driven by the inverter circuit may be indicated by a current representing a load current or a voltage representing an input voltage. The slew rate may also be modified based on a mode configuration of the inverter circuit.

公开(公告)号：US10211732B2

公开(公告)日：2019-02-19

申请号：US15240362

申请日：2016-08-18

Applicant: MediaTek Inc.

Inventor： Chih-Chen Li ,  Kuan-Yu Chu ,  Shan-Fong Hong

IPC: H02M1/32 ,  H02M3/158 ,  H02M1/00

Abstract: An SMPS (Switched Mode Power Supply) circuit includes a first switch element, a second switch element, an inductor, a capacitor, a current sensor, a current comparator, and a controller. The first switch element is coupled between a first power node and a switch node. The second switch element is coupled between the switch node and a second power node. The inductor is coupled between the switch node and an output node. The capacitor is coupled between the output node and the second power node. The current sensor detects a switch current through the second switch element. The current comparator compares the switch current with a first reference current to generate a comparison signal. The controller controls the first switch element and the second switch element according to the comparison signal and a switch voltage at the switch node. The invention can avoid an excessive SMPS output current.

公开(公告)号：US20170310211A1

公开(公告)日：2017-10-26

申请号：US15334332

申请日：2016-10-26

Applicant: MEDIATEK Inc.

Inventor： Shan-Fong Hong ,  Chih-Chen Li ,  Kuan-Yu Chu ,  Chien-Wei Kuan ,  Yen-Hsun Hsu

IPC: H02M3/04 ,  H02M1/08 ,  H02M1/00

CPC classification number: H02M3/04 ,  H02M1/08 ,  H02M3/156 ,  H02M2001/0032 ,  Y02B70/16

Abstract: The invention provides a regulator for DC-DC hybrid-mode power regulation of an output voltage and a load current. The regulator may include a controller and a back-end circuit. The controller controls the output voltage and the load current by charging a connection node when a driving signal is at an on-level, and stopping charging the connection node when the driving signal is at an off-level. The back-end circuit is coupled to the controller, capable of switching between a first mode and a second mode to control transition of the driving signal by different schemes. The back-end circuit switches from the second mode to the first mode when a mode-switch criterion is satisfied, and whether the mode-switch criterion is satisfied is independent of a measurement of the output voltage.

公开(公告)号：US10211723B2

公开(公告)日：2019-02-19

申请号：US15334332

申请日：2016-10-26

Applicant: MEDIATEK Inc.

Inventor： Shan-Fong Hong ,  Chih-Chen Li ,  Kuan-Yu Chu ,  Chien-Wei Kuan ,  Yen-Hsun Hsu

IPC: H02M3/04 ,  H02M1/08 ,  H02M1/00

Abstract: The invention provides a regulator for DC-DC hybrid-mode power regulation of an output voltage and a load current. The regulator may include a controller and a back-end circuit. The controller controls the output voltage and the load current by charging a connection node when a driving signal is at an on-level, and stopping charging the connection node when the driving signal is at an off-level. The back-end circuit is coupled to the controller, capable of switching between a first mode and a second mode to control transition of the driving signal by different schemes. The back-end circuit switches from the second mode to the first mode when a mode-switch criterion is satisfied, and whether the mode-switch criterion is satisfied is independent of a measurement of the output voltage.

公开(公告)号：US20180262097A1

公开(公告)日：2018-09-13

申请号：US15912396

申请日：2018-03-05

Applicant: MediaTek Inc.

Inventor： Kuan-Yu Chu ,  HuaChiang Huang ,  Chih-Chen Li ,  Shan-Fong Hong

IPC: H02M1/08

Abstract: An inverter circuit may include an inverter, a driver coupled to the inverter, and a slew rate control module configured to modify a slew rate of the driver. The slew rate may be modified based on a magnitude of a load driven by the inverter circuit. The magnitude of the load driven by the inverter circuit may be indicated by a current representing a load current or a voltage representing an input voltage. The slew rate may also be modified based on a mode configuration of the inverter circuit.

公开(公告)号：US10008936B2

公开(公告)日：2018-06-26

申请号：US14987735

申请日：2016-01-04

Applicant: MEDIATEK INC.

Inventor： Shan-Fong Hong

IPC: H02M3/158 ,  H02M1/00

CPC classification number: H02M3/1584 ,  H02M2001/0032 ,  H02M2001/0054 ,  Y02B70/1491 ,  Y02B70/16

Abstract: A method for performing phase shedding for a voltage converter having a multi-phase output stage circuit includes: sensing an input current of the voltage converter to generate a first digital signal when enabling at least one first output stage within the multi-phase output stage circuit; sensing the input current of the voltage converter to generate a second digital signal when further enabling a second output stage within the multi-phase output stage circuit; comparing the first digital signal with the second digital signal to generate a comparison resultant signal; dynamically adjusting the phase shedding threshold according to the comparison resultant signal, to automatically search/determine an optimal phase shedding threshold; and, performing the phase shedding when an operation of the voltage converter exceeds the optimal phase shedding threshold.

公开(公告)号：US20170077806A1

公开(公告)日：2017-03-16

申请号：US14987735

申请日：2016-01-04

Applicant: MEDIATEK INC.

Inventor： Shan-Fong Hong

IPC: H02M3/158

CPC classification number: H02M3/1584 ,  H02M2001/0032 ,  H02M2001/0054 ,  Y02B70/1491 ,  Y02B70/16

Abstract: A method for performing phase shedding for a voltage converter having a multi-phase output stage circuit includes: sensing an input current of the voltage converter to generate a first digital signal when enabling at least one first output stage within the multi-phase output stage circuit; sensing the input current of the voltage converter to generate a second digital signal when further enabling a second output stage within the multi-phase output stage circuit; comparing the first digital signal with the second digital signal to generate a comparison resultant signal; dynamically adjusting the phase shedding threshold according to the comparison resultant signal, to automatically search/determine an optimal phase shedding threshold; and, performing the phase shedding when an operation of the voltage converter exceeds the optimal phase shedding threshold.

Abstract translation: 一种用于对具有多相输出级电路的电压转换器进行相位脱落的方法包括：当使能多相输出级电路内的至少一个第一输出级时，感测电压转换器的输入电流以产生第一数字信号 ; 当进一步启用多相输出级电路内的第二输出级时，感测电压转换器的输入电流以产生第二数字信号; 将所述第一数字信号与所述第二数字信号进行比较以产生比较结果信号; 根据比较结果信号动态调整相位阈值，自动搜索/确定最佳相位切除阈值; 并且当电压转换器的操作超过最佳相位偏差阈值时执行相位脱落。