公开(公告)号：US20240145389A1

公开(公告)日：2024-05-02

申请号：US18361116

申请日：2023-07-28

Applicant: MEDIATEK INC.

Inventor： Li-Chiu WENG ,  Yew Teck TIEO ,  Ming-Hsuan WANG ,  Chia-Cheng CHEN ,  Wei-Yi CHANG ,  Jen-Hang YANG ,  Chien-Hsiung HSU

IPC: H01L23/528

CPC classification number: H01L23/5286

Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.