APPARATUSES AND METHODS FOR DYNAMIC FRAME RATE ADJUSTMENT

    公开(公告)号:US20180332252A1

    公开(公告)日:2018-11-15

    申请号:US15806718

    申请日:2017-11-08

    Applicant: MEDIATEK INC.

    Abstract: An image processing apparatus including first circuitry, second circuitry, third circuitry, and fourth circuitry is provided. The first circuitry determines a frame miss rate according to a current frame rate and a target frame rate of an image signal. The second circuitry decreases the target frame rate to the current frame rate when the frame miss rate is greater than a first threshold. The third circuitry increases the target frame rate to an upper-limit frame rate which is determined according to the frame rendering time or memory bandwidth capability, when the frame miss rate is less than a second threshold which is smaller than the first threshold. The fourth circuitry applies the decreased or increased target frame rate for an image to be displayed.

    ELECTROSTATIC DISCHARGE (ESD) PROTECTION CIRCUIT

    公开(公告)号:US20170170165A1

    公开(公告)日:2017-06-15

    申请号:US15149262

    申请日:2016-05-09

    Applicant: MediaTek Inc.

    CPC classification number: H01L27/0248 H01L27/0629 H01L27/092 H02H9/046

    Abstract: The invention provides an ESD (Electrostatic Discharge) protection circuit including a clamp circuit, a switch element, and a detection circuit. The clamp circuit is coupled between an ESD bus and a ground node. The switch element is coupled between a supply node and the ESD bus. The detection circuit is configured to detect whether an ESD event occurs. When no ESD event occurs, the detection circuit closes the switch element, such that the ESD bus is coupled to the supply node. When the ESD event occurs, the detection circuit opens the switch element, such that the ESD bus is decoupled from the supply node.

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