公开(公告)号：US20190123062A1

公开(公告)日：2019-04-25

申请号：US16048418

申请日：2018-07-30

Applicant: MEDIATEK Inc.

Inventor： Chuan-Shian FU ,  Cheng-Jyi CHANG ,  Shao-Hwang SHER

IPC: H01L27/118 ,  H01L27/02

Abstract: An integrated circuit includes a substrate and a plurality of standard cells. The standard cells are formed on the substrate, wherein each standard cell comprises a first fin, a second fin and a third fin, the second fin is located between the first fin and the third fin, and there is a first interval between the first fin and the second fin is different from a second interval between the first fin and the third fin.

公开(公告)号：US20210320040A1

公开(公告)日：2021-10-14

申请号：US17218328

申请日：2021-03-31

Applicant: MEDIATEK INC.

Inventor： Chuan-Shian FU ,  Cheng-Jyi CHANG

IPC: H01L23/02 ,  H01L23/538 ,  H01L23/544

Abstract: A semiconductor structure includes a base layer, semiconductor dies on the base layer, and an inter-die connection layer electrically connecting two adjacent semiconductor dies. Each of the semiconductor dies includes an active area and a seal ring area including a seal ring surrounding the active area. The inter-die connection layer extends over adjacent portions of the seal rings in the seal ring areas of the two adjacent semiconductor dies.