公开(公告)号：US12067959B1

公开(公告)日：2024-08-20

申请号：US18172613

申请日：2023-02-22

Applicant: Meta Platforms Technologies, LLC

Inventor： Nilanjan Goswami ,  Hideo Tamama ,  Christopher James Goodman ,  Steve John Clohset ,  Shanmathi Natarajan

IPC: G09G5/18

CPC classification number: G09G5/18 ,  G09G2310/04

Abstract: A method is disclosed for receiving a synchronization signal from a display circuit configured to display a series of frames, each frame comprising a plurality of tiles of pixels, determining, based on the received synchronization signal, that the display circuit has consumed data corresponding to one or more tiles of a frame, identifying a predetermined number of tiles that are subsequent to the one or more tiles consumed by the display circuit based on the synchronization signal, determining that one or more tiles of the identified tiles require an update, selectively rendering the determined tiles, and transmitting the rendered tiles to the display circuit.

公开(公告)号：US20230044573A1

公开(公告)日：2023-02-09

申请号：US17937742

申请日：2022-10-03

Applicant: Meta Platforms Technologies, LLC

Inventor： Vlad Fruchter ,  Richard Lawrence Greene ,  Hideo Tamama

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/16 ,  G06F9/50 ,  G06F12/0802 ,  G06F12/14

Abstract: In one embodiment, one or more control units may store a position tracker associated with a first window of memory blocks and allow a first processing unit to write data within the first window. The control units may receive, from a second processing unit, a request for reading data with a memory-reading address, compare the memory-reading address to a first starting address of the first window, and prevent the second processing unit from reading the data when the memory-reading address is greater than or equal to the first starting address of the first window. The control units may store, when the data writing process is complete, an updated position tracker of a second window of memory blocks and allow the second processing unit to read the data based on a determination that the memory-reading address is less than a second starting address of the second window.

公开(公告)号：US20240282281A1

公开(公告)日：2024-08-22

申请号：US18172613

申请日：2023-02-22

Applicant: Meta Platforms Technologies, LLC

Inventor： Nilanjan Goswami ,  Hideo Tamama ,  Christopher James Goodman ,  Steve John Clohset ,  Shanmathi Natarajan

IPC: G09G5/18

CPC classification number: G09G5/18 ,  G09G2310/04

Abstract: A method is disclosed for receiving a synchronization signal from a display circuit configured to display a series of frames, each frame comprising a plurality of tiles of pixels, determining, based on the received synchronization signal, that the display circuit has consumed data corresponding to one or more tiles of a frame, identifying a predetermined number of tiles that are subsequent to the one or more tiles consumed by the display circuit based on the synchronization signal, determining that one or more tiles of the identified tiles require an update, selectively rendering the determined tiles, and transmitting the rendered tiles to the display circuit.

公开(公告)号：US11580026B2

公开(公告)日：2023-02-14

申请号：US17578392

申请日：2022-01-18

Applicant: META PLATFORMS TECHNOLOGIES, LLC

Inventor： Vlad Fruchter ,  Richard Lawrence Greene ,  Hideo Tamama

IPC: G06F12/0871 ,  G06F3/06 ,  G06F12/02 ,  G06F12/14

Abstract: In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The first control unit may be configured to obtain, from the second control unit, a first memory address associated with a data reading process of the second processing unit, receive a write request from the first processing unit, the read request having an associated second memory address, and write data into the memory region based on the write request in response to a determination that the second memory address falls outside of the guarded reading region.

公开(公告)号：US11481323B2

公开(公告)日：2022-10-25

申请号：US16582403

申请日：2019-09-25

Applicant: Meta Platforms Technologies, LLC

Inventor： Vlad Fruchter ,  Richard Lawrence Greene ,  Hideo Tamama

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/16 ,  G06F9/50 ,  G06F12/0802 ,  G06F12/14

Abstract: In one embodiment, one or more control units may store a position tracker associated with a first window of memory blocks and allow a first processing unit to write data within the first window. The control units may receive, from a second processing unit, a request for reading data with a memory-reading address, compare the memory-reading address to a first starting address of the first window, and prevent the second processing unit from reading the data when the memory-reading address is greater than or equal to the first starting address of the first window. The control units may store, when the data writing process is complete, an updated position tracker of a second window of memory blocks and allow the second processing unit to read the data based on a determination that the memory-reading address is less than a second starting address of the second window.