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公开(公告)号:US11600326B2
公开(公告)日:2023-03-07
申请号:US17154945
申请日:2021-01-21
发明人: John Schreck , Dan Penney
IPC分类号: G11C15/04 , G11C11/406 , G11C11/4094 , G11C11/408 , G11C11/4096 , G11C11/4074 , G11C11/419 , G11C16/28
摘要: Embodiments of the disclosure are drawn to apparatuses and methods for content addressable memory (CAM) cells. Each CAM cell may include a comparator portion which stores a bit of information. Each CAM cell may also include a comparator portion, which compares an external bit to the stored bit. A group of CAM cells may be organized into a CAM register, with each CAM cell coupled in common to a signal line. Any of the CAM cells may change a voltage on the signal line if the external bit does not match the stored bit.
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公开(公告)号:US10930349B2
公开(公告)日:2021-02-23
申请号:US16411573
申请日:2019-05-14
发明人: John Schreck , Dan Penney
IPC分类号: G11C15/04 , G11C16/28 , G11C11/406 , G11C11/4094 , G11C11/408 , G11C11/4096 , G11C11/4074 , G11C11/419
摘要: Embodiments of the disclosure are drawn to apparatuses and methods for content addressable memory (CAM) cells. Each CAM cell may include a comparator portion which stores a bit of information. Each CAM cell may also include a comparator portion, which compares an external bit to the stored bit. A group of CAM cells may be organized into a CAM register, with each CAM cell coupled in common to a signal line. Any of the CAM cells may change a voltage on the signal line if the external bit does not match the stored bit.
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公开(公告)号:US11264096B2
公开(公告)日:2022-03-01
申请号:US16411573
申请日:2019-05-14
发明人: John Schreck , Dan Penney
IPC分类号: G11C15/04 , G11C16/28 , G11C11/406 , G11C11/4074 , G11C11/408 , G11C11/4096 , G11C11/419 , G11C11/4094
摘要: Embodiments of the disclosure are drawn to apparatuses and methods for content addressable memory (CAM) cells. Each CAM cell may include a comparator portion which stores a bit of information. Each CAM cell may also include a comparator portion, which compares an external bit to the stored bit. A group of CAM cells may be organized into a CAM register, with each CAM cell coupled in common to a signal line. Any of the CAM cells may change a voltage on the signal line if the external bit does not match the stored bit.
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公开(公告)号:US20210142852A1
公开(公告)日:2021-05-13
申请号:US17154945
申请日:2021-01-21
发明人: John Schreck , Dan Penney
IPC分类号: G11C15/04 , G11C11/406 , G11C11/4094 , G11C11/408 , G11C11/4096 , G11C11/4074 , G11C11/419 , G11C16/28
摘要: Embodiments of the disclosure are drawn to apparatuses and methods for content addressable memory (CAM) cells. Each CAM cell may include a comparator portion which stores a bit of information. Each CAM cell may also include a comparator portion, which compares an external bit to the stored bit. A group of CAM cells may be organized into a CAM register, with each CAM cell coupled in common to a signal line. Any of the CAM cells may change a voltage on the signal line if the external bit does not match the stored bit.
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