公开(公告)号：US20220122931A1

公开(公告)日：2022-04-21

申请号：US17074267

申请日：2020-10-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Hidenori Yamaguchi ,  Shunsuke Asanao ,  Katsumi Koge ,  Shigeharu Nishimura

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

Abstract: A semiconductor device includes a first layer including a plurality of wirings arranged in line and space layout and a second layer including a pad electrically connected to at least one of the wirings, wherein the wirings and the pads are patterned by different lithographic processes.

公开(公告)号：US11581278B2

公开(公告)日：2023-02-14

申请号：US17074267

申请日：2020-10-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Hidenori Yamaguchi ,  Shunsuke Asanao ,  Katsumi Koge ,  Shigeharu Nishimura

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

Abstract: A semiconductor device includes a first layer including a plurality of wirings arranged in line and space layout and a second layer including a pad electrically connected to at least one of the wirings, wherein the wirings and the pads are patterned by different lithographic processes.