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公开(公告)号:US20200007124A1
公开(公告)日:2020-01-02
申请号:US16490233
申请日:2018-02-07
发明人: Daisuke MATSUURA , Takanori NARITA , Masahiro KATO , Daisuke KOBAYASHI , Kazuyuki HIROSE , Osamu KAWASAKI , Yuya KAKEHASHI , Taichi ITO
IPC分类号: H03K17/687 , H01L27/092 , H01L21/8238
摘要: An operation adjustment method of an SOI device comprises steps of: (a) obtaining a drain current-substrate bias voltage characteristic of an NMOS transistor for a source-gate voltage of 0V; (b) obtaining a lowest substrate bias voltage which turns on the NMOS transistor from the drain current-substrate bias voltage characteristic; (c) determining an upper limit of a substrate bias voltage of a PMOS transistor as a voltage obtained by subtracting a built-in potential of a pn junction from the lowest substrate bias voltage; and (d) determining the substrate bias voltage of the PMOS transistor as a positive voltage lower than the upper limit. Reduction in the power consumption and maintenance of the radiation tolerance are both achieved for the SOI device.