公开(公告)号：US11209985B2

公开(公告)日：2021-12-28

申请号：US16391439

申请日：2019-04-23

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Sheng-Lun Wu ,  Chun-Lien Su ,  Zong-Qi Zhou

IPC: G06F3/06 ,  G06F9/30 ,  G06F1/3206

Abstract: An input/output delay optimization method, used in an electronic system comprising a host controller and a memory device. The method comprising: switching the memory device from a first mode to a second mode a high power consumption mode of the memory device; transmitting one or more first read commands to the memory device, wherein the one or more first read commands are transmitted according to different output delay values; determining an optimized output delay value according to the response status of memory device for the one or more first read commands; transmitting one or more second read commands to the memory device, wherein the one or more second read commands are transmitted according to the optimized output delay value; receiving a known data from the memory device according to different input delay values; and determining an optimized input delay value according to the correctness of the received known data.

公开(公告)号：US12112165B2

公开(公告)日：2024-10-08

申请号：US17956155

申请日：2022-09-29

Applicant: Macronix International Co., Ltd.

Inventor： Sheng-Lun Wu ,  Chun-Lien Su

IPC: G06F9/30 ,  G06F1/08 ,  G06F9/54

CPC classification number: G06F9/30021 ,  G06F1/08 ,  G06F9/544

Abstract: Systems, methods, and apparatus including computer-readable mediums for managing status information of logic units are provided. In one aspect, a device includes a semiconductor device including one or more logic units and a reporting bus and a controller coupled to the semiconductor device and configured to store status information of the one or more logic units in the semiconductor device. Each of the one or more logic units is configured to send information associated with the logic unit using a corresponding reporting unit in the semiconductor device through the reporting bus to the controller to indicate a status of the logic unit. The controller is configured to, in response to receiving the information associated with the logic unit, update corresponding status information of the logic unit based on the status of the logic unit.