公开(公告)号：US5793766A

公开(公告)日：1998-08-11

申请号：US664615

申请日：1996-06-18

申请人： Marc Dieudonne ,  Jean-Pierre Glon

发明人： Marc Dieudonne ,  Jean-Pierre Glon

IPC分类号： H04Q3/00 ,  H04L12/56 ,  H04Q11/04 ,  H04J3/16

CPC分类号： H04Q11/0478 ,  H04L2012/5652

摘要： A multiplexing process in an asynchronous transfer mode telecommunication network consists in placing a payload in a series of cells supporting the same logical channel a series of data containers supporting the same logical channel, each container including a load that is a quantity of data greater than the payload of each cell. In one preferred embodiment the payload of each container is composite. It includes conventional synchronous digital channel samples and data micropackets each of which has a label indicating a logical channel and the length of the packet. Applications include ATM telecommunication networks.

摘要翻译： 异步传输模式电信网络中的复用过程包括将负载放置在支持相同逻辑信道的一系列小区中，支持相同逻辑信道的一系列数据容器，每个容器包括一个大于 每个单元的有效载荷。 在一个优选实施例中，每个容器的有效载荷是复合的。 它包括常规的同步数字信道样本和数据微组件，其中每个具有指示逻辑信道的标签和分组的长度。 应用包括ATM电信网络。

公开(公告)号：US5521915A

公开(公告)日：1996-05-28

申请号：US278279

申请日：1994-07-21

申请人： Marc Dieudonne ,  Jean-Pierre Glon

发明人： Marc Dieudonne ,  Jean-Pierre Glon

IPC分类号： H04L12/70 ,  H04Q11/04 ,  H04L12/56

CPC分类号： H04Q11/0478 ,  H04L2012/5646

摘要： A cell assembly device switches and assembles synchronous digital channels into asynchronous transfer mode cells supporting asynchronous logical channels. The cells are sent on asynchronous multiplex links, and the synchronous digital channels are conveyed by synchronous multiplex links organized into recurrent frames. Samples of each synchronous digital channel are represented by binary words placed in time slots occupying fixed positions in the frames. The cell assembly device includes: an input memory for storing the samples of all the synchronous digital channels of each frame as the samples are received; cell formation memories which supply cells to the asynchronous multiplex links; a cell identifier memory for storing information for each cell; a marking memory containing a link list containing the information necessary for switching of the synchronous digital channels to the asynchronous logical channels; and a control circuit for transmitting octets from the input memory into one of the cell formation memories, and for transmitting a header from the cell identifier memory into one of the cell formation memories, at write addresses supplied by the cell identifier memory.

摘要翻译： 单元组装设备将同步数字通道切换并组装成支持异步逻辑通道的异步传输模式单元。 小区在异步多路复用链路上发送，并且同步数字信道由组织成复现帧的同步多路复用链路传送。 每个同步数字通道的采样由位于帧中固定位置的时隙中的二进制字表示。 电池组装装置包括：输入存储器，用于在接收到样本时存储每个帧的所有同步数字信道的样本; 将单元提供给异步多路复用链路的单元形成存储器; 用于存储每个单元的信息的单元标识符存储器; 标记存储器，其包含包含将同步数字信道切换到异步逻辑信道所需的信息的链路列表; 以及控制电路，用于将八位字节从输入存储器传送到单元形成存储器之一，并用于在由单元标识符存储器提供的写入地址处将单元标识符存储器的报头发送到单元形成存储器之一。