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公开(公告)号：US10897260B2
公开(公告)日：2021-01-19
申请号：US15366820
申请日：2016-12-01
发明人： Zhao Liu , Wen Yan , Zhenhua Xiong , Liang Yuan , Hongzheng Han , Yuan Lu
摘要： Systems and methods for performing phase error correction are provided. A reference clock signal and a target clock signal are received. A first value is generated based on a first amount of time between a first edge of the reference clock signal and a corresponding first edge of the target clock signal. A phase of the target clock signal is adjusted a first time based on a given amount computed using the first value. After the phase of the target clock signal is adjusted, a second value is generated based on a second amount of time between a second edge of the reference clock signal and a corresponding second edge of the target clock signal. The phase of the target clock signal is adjusted a second time based on the given amount, the first value, and the second value.
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公开(公告)号：US20180091162A1
公开(公告)日：2018-03-29
申请号：US15366820
申请日：2016-12-01
发明人： Zhao Liu , Wen Yan , Zhenhua Xiong , Liang Yuan , Hongzheng Han , Yuan Lu
摘要： Systems and methods for performing phase error correction are provided. A reference clock signal and a target clock signal are received. A first value is generated based on a first amount of time between a first edge of the reference clock signal and a corresponding first edge of the target clock signal. A phase of the target clock signal is adjusted a first time based on a given amount computed using the first value. After the phase of the target clock signal is adjusted, a second value is generated based on a second amount of time between a second edge of the reference clock signal and a corresponding second edge of the target clock signal. The phase of the target clock signal is adjusted a second time based on the given amount, the first value, and the second value.
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