公开(公告)号：US5712737A

公开(公告)日：1998-01-27

申请号：US701541

申请日：1996-08-22

申请人： Masami Tsubaki ,  Shuhei Kanaoka ,  Koji Kosaka ,  Yoshiyuki Yahagi ,  Toshiyuki Yamazaki ,  Hiromi Inoue ,  Kaoru Sekigawa ,  Takeshi Ishihara

发明人： Masami Tsubaki ,  Shuhei Kanaoka ,  Koji Kosaka ,  Yoshiyuki Yahagi ,  Toshiyuki Yamazaki ,  Hiromi Inoue ,  Kaoru Sekigawa ,  Takeshi Ishihara

IPC分类号： G11B27/02 ,  G11B27/032 ,  G11B27/34

CPC分类号： G11B27/032 ,  G11B27/34

摘要： A method and an apparatus for automatically editing audio signals by determining an editing section on a recording medium having the signals recorded thereon. A first editing point is searched for on the recording medium, and the location of that point is stored in a memory. A second editing point is searched for on the recording medium. The location of the first editing point is compared with that of the second editing point. One of the two locations is set as an in-point and the other location as an out-point in accordance with the result of the comparison. The editing section determined by the in- and out-points is displayed on a screen.

摘要翻译： 一种用于通过在其上记录有信号的记录介质上确定编辑部分来自动编辑音频信号的方法和装置。 在记录介质上搜索第一编辑点，并将该点的位置存储在存储器中。 在记录介质上搜索第二编辑点。 将第一编辑点的位置与第二编辑点的位置进行比较。 根据比较结果将两个位置中的一个设置为入点，另一个位置作为出点设置。 由屏幕和屏幕确定的编辑部分显示在屏幕上。

公开(公告)号：US5926332A

公开(公告)日：1999-07-20

申请号：US928171

申请日：1997-09-12

申请人： Yoshiyuki Yahagi ,  Yukihira Maruyama ,  Masami Sato ,  Kaoru Sekigawa

发明人： Yoshiyuki Yahagi ,  Yukihira Maruyama ,  Masami Sato ,  Kaoru Sekigawa

IPC分类号： G11B15/10 ,  G11B15/18 ,  G11B15/467 ,  G11B20/10 ,  G11B27/00 ,  G11B27/032 ,  H04S1/00 ,  G11B27/02

CPC分类号： H04S1/007 ,  G11B15/1875 ,  G11B20/10527 ,  G11B27/005 ,  G11B27/032 ,  G11B15/103 ,  G11B15/4673 ,  G11B2220/90 ,  G11B2220/913

摘要： A variable speed reproduction of speech from memory depending on the indication of a jog dial, is accomplished by buffer memory (23) for speech sound and a jog dial (17) for controlling a read speed from this memory. Speech sound data is read out from the buffer memory (23) at a speed corresponding to the indication of the jog dial (17). The speech sound data is reproduced, independent of the jog dial (17), from a tape (13) and is written into the memory (23). A capstan motor drive circuit (18) detects the difference between the read address and the write address of the memory (23) and controls the reproduction speed of the sound speech data from the tape (13) in accordance with this difference. Since the read speed is directly controlled for the memory (23), no time delay exists between the speed command and the actual variable-speed reproduction. The address difference between write and read of the memory (23) is always monitored to keep the buffer from becoming empty so that continuous reproduction can be made, and so that, when the speech sound is edited, variable-speed continuous reproduction can be made for speech editing by the buffer memory (23) alone.

摘要翻译： 根据微动拨盘的指示，来自存储器的语音的可变速度再现由用于语音的缓冲存储器（23）和用于从该存储器控制读取速度的微动拨盘（17）来实现。 以对应于微动拨盘（17）的指示的速度从缓冲存储器（23）读出语音数据。 独立于微动拨盘（17）的语音声音数据从磁带（13）再现，并被写入存储器（23）。 主动马达驱动电路（18）检测读取地址和存储器（23）的写入地址之间的差异，并且根据该差异控制来自带（13）的声音语音数据的再现速度。 由于直接对存储器（23）控制读取速度，所以在速度命令和实际的可变速度再现之间不存在时间延迟。 始终监视存储器（23）的写入和读取之间的地址差异以保持缓冲器不变空，使得可以进行连续再现，并且使得当语音被编辑时，可以进行可变速度连续再现 用于仅由缓冲存储器（23）进行语音编辑。

公开(公告)号：US5995470A

公开(公告)日：1999-11-30

申请号：US838314

申请日：1997-04-08

申请人： Masami Tsubaki ,  Kaoru Sekigawa

发明人： Masami Tsubaki ,  Kaoru Sekigawa

IPC分类号： G11B11/10 ,  G11B11/105 ,  G11B27/034 ,  G11B27/036 ,  G11B7/00

CPC分类号： G11B27/036 ,  G11B11/10595 ,  G11B2220/20 ,  G11B2220/2525 ,  G11B27/034

摘要： An apparatus for editing an input information signal is capable of preventing breaks in sound even if the length of a cut is edited as extremely short. In the editing apparatus, the input digital information signal is temporarily stored in a recording buffer means. Further, the digital information signal is read at a speed faster than its write speed and recorded on a recording medium. The digital information signal read from the recording medium is written into a reproducing buffer means. Thereafter, the digital information signal is read from the reproducing buffer means at a speed slower than its write speed, after which it is restored to an analog information signal. A control means for controlling recording and reproduction controls whether an information signal should be recorded in an auxiliary area according to the presence or absence of a splice recording, and monitors whether a point to be edited has been changed to a length causing a break in sound due to editing. Thus, even if the length of a redefined cut is less than or equal to a limit length, edit working allows the prevention of the length of the cut being less than or equal to the limit length. It is thus possible to reliably prevent the occurrence of breaks in reproduced sound.

摘要翻译： 用于编辑输入信息信号的装置能够防止在切割的长度被非常短地编辑时的声音中断。 在编辑装置中，输入数字信息信号被临时存储在记录缓冲器装置中。 此外，数字信息信号以比其写入速度更快的速度读取并记录在记录介质上。 从记录介质读取的数字信息信号被写入再现缓冲器装置。 此后，数字信息信号以比其写入速度慢的速度从再现缓冲器装置读取，之后它被恢复到模拟信息信号。 用于控制记录和再现的控制装置根据是否存在拼接记录来控制信息信号是否应当被记录在辅助区域中，并且监视是否将要编辑的点改变为导致声音中断的长度 由于编辑。 因此，即使重新定义的切口的长度小于或等于限制长度，编辑工作允许防止切割的长度小于或等于限制长度。 因此，可以可靠地防止再生声音中断的发生。

公开(公告)号：US5717534A

公开(公告)日：1998-02-10

申请号：US507303

申请日：1995-08-28

申请人： Yoshiyuki Yahagi ,  Yukihiro Maruyama ,  Masami Sato ,  Kaoru Sekigawa

发明人： Yoshiyuki Yahagi ,  Yukihiro Maruyama ,  Masami Sato ,  Kaoru Sekigawa

IPC分类号： G11B15/10 ,  G11B15/18 ,  G11B15/467 ,  G11B20/10 ,  G11B27/00 ,  G11B27/032 ,  H04S1/00 ,  G11B5/09

CPC分类号： H04S1/007 ,  G11B15/1875 ,  G11B20/10527 ,  G11B27/005 ,  G11B27/032 ,  G11B15/103 ,  G11B15/4673 ,  G11B2220/90 ,  G11B2220/913

摘要： A variable speed reproduction of speech from memory depending on the indication of a jog dial is accomplished by buffer memory (23) for speech sound and a jog dial (17) for controlling a read speed from this memory. Speech sound data is read out from the buffer memory (23) at a speed corresponding to the indication of the jog dial (17). The speech sound data is reproduced, independent of the jog dial (17), from a tape (13) and is written into the memory (23). A capstan motor drive circuit (18) detects the difference between the read address and the write address of the memory (23) and controls the reproduction speed of the sound speech data from the tape (13) in accordance with this difference. Since the read speed is directly controlled for the memory (23), no time delay exists between the speed command and the actual variable-speed reproduction. The address difference between write and read of the memory (23) is always monitored to keep the buffer from becoming empty so that continuous reproduction can be made, so that when the speech sound is edited, variable-speed continuous reproduction can be made for speech editing by the buffer memory (23) alone.

摘要翻译： PCT No.PCT / JP94 / 00339 Sec。 371 1995年12月11日第 102（e）日期1995年12月11日PCT 1994年3月3日PCT公布。 公开号WO94 / 20960 日期1994年9月15日根据用于语音的缓冲存储器（23）和用于从该存储器控制读取速度的微动拨盘（17）来实现取决于微动拨盘指示的来自存储器的语音的可变速度再现。 以对应于微动拨盘（17）的指示的速度从缓冲存储器（23）读出语音数据。 独立于微动拨盘（17）的语音声音数据从磁带（13）再现，并被写入存储器（23）。 主动马达驱动电路（18）检测读取地址和存储器（23）的写入地址之间的差异，并且根据该差异控制来自带（13）的声音语音数据的再现速度。 由于直接对存储器（23）控制读取速度，所以在速度命令和实际的可变速度再现之间不存在时间延迟。 始终监视存储器（23）的写入和读取之间的地址差异以保持缓冲器不变空，使得可以进行连续再现，使得当语音被编辑时，可以对语音进行可变速度连续再现 仅由缓冲存储器（23）进行编辑。

公开(公告)号：US20080060031A1

公开(公告)日：2008-03-06

申请号：US11897805

申请日：2007-08-30

申请人： Kaoru Sekigawa

发明人： Kaoru Sekigawa

IPC分类号： H04N7/173

CPC分类号： H04L12/66

摘要： A matrix switcher includes a switcher unit having connection switches provided at intersections of input signal lines and output signal lines and a control unit having a main controller and a backup controller. The backup controller operates a Web server program to transfer a setup command to the main controller upon receiving the setup command. The main controller executes: processing of switching a connection relation between the input signal lines and output signal lines in the switcher unit; processing of transferring a switching command to another matrix switcher upon receiving the switching command for another switcher; processing of setting up the matrix switcher upon receiving the setup command for the switcher; and processing of transferring the setup command to another matrix switcher upon receiving the setup command for another switcher.

摘要翻译： 矩阵切换器包括具有设置在输入信号线和输出信号线的交点处的连接开关的开关单元和具有主控制器和备用控制器的控制单元。 备份控制器操作一个Web服务器程序，用于在接收到设置命令时将安装命令传送到主控制器。 主控制器执行：在切换单元中切换输入信号线与输出信号线之间的连接关系的处理; 在接收到另一个切换器的切换命令时，将切换命令传送到另一矩阵切换器的处理; 处理在接收到切换器的设置命令时设置矩阵切换器; 以及在接收到另一个切换器的设置命令时将设置命令传送到另一矩阵切换器的处理。

公开(公告)号：US07487275B2

公开(公告)日：2009-02-03

申请号：US11582263

申请日：2006-10-17

申请人： Kaoru Sekigawa

发明人： Kaoru Sekigawa

IPC分类号： G06F13/36 ,  G06F15/00

CPC分类号： G06F15/17375

摘要： A signal processing system manages terminal numbers as a whole system without being affected by exchange of substrates and performs signal processing of intended object. A control unit sequentially assigns terminal numbers to substrates in numerical order of slots of each kind and validates only terminal numbers regarding the slot where the relevant kind of substrate is inserted. Information indicating regions of different terminal numbers in a space where the number of input/output terminals are more than those of the whole system is retained corresponding to the substrate of each kind. Based on a command specifying input/output signals by the terminal numbers in the space, terminal numbers of a substrate of the kind corresponding to the region including the specified terminal numbers are obtained, and processing corresponding to the command is executed only when those terminal numbers are valid in the substrate of the kind.

摘要翻译： 信号处理系统作为整个系统管理终端号码而不受基板交换的影响，并执行预期对象的信号处理。 控制单元按照各种时隙的数字顺序顺序地分配终端号到基板，并且仅验证插入有关种类的基板的槽的端子号。 在输入/输出端子数多于整个系统的空间中指示不同端子编号的区域的信息对应于每种类型的基板保持。 基于指定空间中的终端号码的输入/输出信号的命令，获得与包括指定的终端号码的区域相对应的类型的基板的终端号码，并且仅当这些终端号码 在这种底物中有效。

公开(公告)号：US20070180005A1

公开(公告)日：2007-08-02

申请号：US11582263

申请日：2006-10-17

申请人： Kaoru Sekigawa

发明人： Kaoru Sekigawa

IPC分类号： G06F15/00

CPC分类号： G06F15/17375

摘要： A signal processing system manages terminal numbers as a whole system without being affected by exchange of substrates and performs signal processing of intended object. A control unit sequentially assigns terminal numbers to substrates in numerical order of slots of each kind and validates only terminal numbers regarding the slot where the relevant kind of substrate is inserted. Information indicating regions of different terminal numbers in a space where the number of input/output terminals are more than those of the whole system is retained corresponding to the substrate of each kind. Based on a command specifying input/output signals by the terminal numbers in the space, terminal numbers of a substrate of the kind corresponding to the region including the specified terminal numbers are obtained, and processing corresponding to the command is executed only when those terminal numbers are valid in the substrate of the kind.

摘要翻译： 信号处理系统作为整个系统管理终端号码而不受基板交换的影响，并执行预期对象的信号处理。 控制单元按照各种时隙的数字顺序顺序地分配终端号到基板，并且仅验证插入有关种类的基板的槽的端子号。 在输入/输出端子数多于整个系统的空间中指示不同端子编号的区域的信息对应于每种类型的基板保持。 基于指定空间中的终端号码的输入/输出信号的命令，获得与包括指定的终端号码的区域相对应的类型的基板的终端号码，并且仅当这些终端号码 在这种底物中有效。

公开(公告)号：US07817537B2

公开(公告)日：2010-10-19

申请号：US11897805

申请日：2007-08-30

申请人： Kaoru Sekigawa

发明人： Kaoru Sekigawa

IPC分类号： H04L1/00

CPC分类号： H04L12/66

摘要： A matrix switcher includes a switcher unit having connection switches provided at intersections of input signal lines and output signal lines and a control unit having a main controller and a backup controller. The backup controller operates a Web server program to transfer a setup command to the main controller upon receiving the setup command. The main controller executes: processing of switching a connection relation between the input signal lines and output signal lines in the switcher unit; processing of transferring a switching command to another matrix switcher upon receiving the switching command for another switcher; processing of setting up the matrix switcher upon receiving the setup command for the switcher; and processing of transferring the setup command to another matrix switcher upon receiving the setup command for another switcher.

摘要翻译： 矩阵切换器包括具有设置在输入信号线和输出信号线的交点处的连接开关的开关单元和具有主控制器和备用控制器的控制单元。 备份控制器操作一个Web服务器程序，用于在接收到设置命令时将安装命令传送到主控制器。 主控制器执行：在切换单元中切换输入信号线与输出信号线之间的连接关系的处理; 在接收到另一个切换器的切换命令时，将切换命令传送到另一矩阵切换器的处理; 处理在接收到切换器的设置命令时设置矩阵切换器; 以及在接收到另一个切换器的设置命令时将设置命令传送到另一矩阵切换器的处理。

公开(公告)号：US5530599A

公开(公告)日：1996-06-25

申请号：US808160

申请日：1991-12-13

申请人： Kaoru Sekigawa

发明人： Kaoru Sekigawa

IPC分类号： G11B15/087 ,  G11B20/10 ,  G11B20/12 ,  G11B27/30 ,  G11B20/20

CPC分类号： G11B27/3036 ,  G11B20/10527 ,  G11B27/3063 ,  G11B2220/90 ,  G11B2220/913

摘要： A digital tape recorder is provided in which main digital signals and time code signals are recorded on a magnetic tape after realization of the timing concurrence between these signals. To this end, a delay correction circuit 23 for delaying the input time code signals by a delay time at an A/D converter 13 or a delay time at a digital input interfacing circuit 16 are provided. The input time code signals delayed by the delay correction circuit 23 and main digital signals from the A/D converter 13 or the digital input interfacing circuit 16 are transmitted to an encoder 17 and recorded on the tape 30 in such a state in which the in-line relationship or timing concurrence is maintained between these main digital signals and the time code signals.

摘要翻译： 提供了一种数字磁带录像机，其中在实现这些信号之间的定时同步之后，主数字信号和时间码信号被记录在磁带上。 为此，提供了延迟校正电路23，用于将输入时间码信号延迟A / D转换器13的延迟时间或数字输入接口电路16的延迟时间。 由延迟校正电路23延迟的输入时间码信号和来自A / D转换器13或数字输入接口电路16的主数字信号被传送到编码器17并记录在磁带30上， 这些主数字信号和时间码信号之间保持线路关系或时序同步。