Arbitration circuit for arbitrating requests from multiple processors
    1.
    发明授权
    Arbitration circuit for arbitrating requests from multiple processors 失效
    用于仲裁来自多个处理器的请求的仲裁电路

    公开(公告)号:US6029219A

    公开(公告)日:2000-02-22

    申请号:US30279

    申请日:1998-02-25

    CPC分类号: G06F13/362

    摘要: A round robin arbitration circuit arbitrating N requests has a register storing one of N values, a priority encoder selecting one of N priority patterns according to the value in the register and assigning priorities to the requests based on the selected priority pattern, thereby conducting arbitration between the requests, a circuit updating the value in the register among the N values in a predetermined order synchronously with the arbitration, and a circuit updating the value in the register among the N values in the predetermined order at regular intervals that are asynchronous with the arbitration. At the regular intervals that are asynchronous with the arbitration, a jump is made in the predetermined updating order of the values to be set in the register. Accordingly, even if live-lock occurs, it will be solved when such a jump is made to make the number of priority patterns disagree with the number of requests issued in a loop.

    摘要翻译: 仲裁N请求的循环仲裁电路具有存储N个值之一的寄存器,优先级编码器根据寄存器中的值选择N个优先级模式之一,并且基于所选择的优先级模式为请求分配优先级,从而在 所述请求,以与所述仲裁同步的预定顺序更新所述N个值中的所述寄存器中的值的电路,以及以与所述仲裁异步的规则间隔以所述预定顺序以所述预定顺序更新所述N个值中的所述寄存器中的值的电路 。 以与仲裁异步的规则间隔,以要在寄存器中设置的值的预定更新顺序进行跳转。 因此,即使发生实时锁定,当进行这样的跳跃以使优先权模式的数量与循环中发出的请求的数量不同时,也将被解决。