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1.发明授权I/Q demodulator device with three power detectors and two A/D converters 失效I / Q解调器具有三个功率检测器和两个A / D转换器公开(公告)号：US06999528B2
公开(公告)日：2006-02-14
申请号：US09947145
申请日：2001-09-05
CPC分类号： H03D1/2245 , H03D3/007 , H03D9/04 , H04B1/30
摘要： The present invention relates to a method and a device for the I/Q demodulation of modulated RF signals. The I/Q demodulator (60) has a first input for the RF signal (61) to be demodulated and a second input for a RF signal (62) originating from a local oscillator (20). The demodulator (60) combines the two RF signals (61,62) to generate three output signals supplied to three power detectors. In a combination unit (70) the three power signals of the power detectors are merged in two signal branches wherein after passing an A/D converting (72) and digital processing unit (73) one signal is the I component and the other one is the Q component of the received modulated RF signal (61).
摘要翻译： 本发明涉及用于调制RF信号的I / Q解调的方法和装置。 I / Q解调器（60）具有要被解调的RF信号（61）的第一输入和源自本地振荡器（20）的RF信号（62）的第二输入。 解调器（60）组合两个RF信号（61,62）以产生提供给三个功率检测器的三个输出信号。 在组合单元（70）中，功率检测器的三个功率信号被合并在两个信号分支中，其中在通过A / D转换（72）和数字处理单元（73）之后，一个信号是I分量，另一个是 所接收的调制RF信号（61）的Q分量。
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公开(公告)号：US20060284652A1
公开(公告)日：2006-12-21
申请号：US10493241
申请日：2001-10-31
IPC分类号： H03K9/06
CPC分类号： H03D1/18
摘要： A high performance power detection circuit suitable to be made monolithic, being compact and low at cost, suitable to a radio-frequency operation in a wide band, having excellent linearity in detection characteristics, small fluctuation of detection characteristics against bias fluctuation, small fluctuation of detection characteristics against FET threshold voltage fluctuation and a small DC offset, which does not require an additional circuit even when a subsequent circuit has a balanced input; and a demodulator using the same. The power detection circuit uses two transistors (FET) Q101 and Q102 having approximately same characteristics, wherein a connection point of sources are connected to a resistor element R103 as a current source, are used as active elements; gates and drains of the transistors Q101 and Q102 are supplied with approximately same bias voltages; drains of them are supplied with approximately same drain bias voltages; a capacitor C104, wherein a capacitance value is set to be a sufficiently large value, is connected between sources of transistors Q101 and Q102 and a ground; capacitors C102 and C103, wherein capacitance values are approximately same and set to be sufficiently large values, are connected between drains of the transistors Q101 and Q102 and a ground; a radio-frequency signal RFin is supplied to a gate of the transistor Q101; and a voltage difference between a drain of the transistor Q101 and a drain of the transistor Q102 is regarded as a detection output.
摘要翻译： 高性能功率检测电路适用于单片，小巧，成本低，适用于宽带的射频工作，检测特性线性好，检测特性与偏置波动的波动小，波动小 即使在后续电路具有平衡输入的情况下也不需要额外的电路; 以及使用该解调器的解调器。 功率检测电路使用具有大致相同特性的两个晶体管（FET）Q 101和Q 102，其中源极的连接点连接到作为电流源的电阻器元件R 103用作有源元件; 晶体管Q 101和Q 102的栅极和漏极被提供有大致相同的偏置电压; 它们的漏极具有大致相同的漏极偏置电压; 将电容值设定为足够大的电容器C 104连接在晶体管Q 101和Q 102的源极与地之间; 电容器C 102和C 103，其中电容值大致相同且设置为足够大的值，连接在晶体管Q 101和Q 102的漏极与地之间; 射频信号RFin被提供给晶体管Q 101的栅极; 将晶体管Q101的漏极与晶体管Q102的漏极之间的电压差作为检测输出。
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公开(公告)号：US07039129B2
公开(公告)日：2006-05-02
申请号：US09901273
申请日：2001-07-09
IPC分类号： H44L27/16
摘要： The present invention relates to an I/Q demodulator (21) comprising a n-port structure (1,16) is provided, wherein n is an integer value of 4,5 or 6. The demodulator (21) is supplied at a first input (3) with a RF signal (2) which has to be demodulated. At a second input (5) it is supplied with a second RF signal (4). The n−2 output signals (6) are detected by power sensors (7). After low pass filtering (14) the output signals of the power sensors (7) are multiplexed by a multiplexing means (8).
摘要翻译： 本发明涉及一种包括n端口结构（I16）的I / Q解调器（21），其中n是4,5或6的整数值。解调器（21）以第一 输入（3）与必须被解调的RF信号（2）。 在第二输入（5）处，它被提供有第二RF信号（4）。 n-2个输出信号（6）由功率传感器（7）检测。 在低通滤波（14）之后，功率传感器（7）的输出信号由复用装置（8）复用。
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公开(公告)号：US06683471B2
公开(公告)日：2004-01-27
申请号：US09938146
申请日：2001-08-22
IPC分类号： G01R3126
CPC分类号： G01R21/10
摘要： The present invention relates to a circuitry for detecting the power of a RF signal (7) comprising a FET transistor (1) connected in parallel to two inputs (2, 2′) for supplying the RF signal and two outputs (13, 13′) for detecting the power of the RF signal (7). The circuitry has a resistor (9) having a resistance larger than the drain-source resistance of the FET transistor (1). This resistor (9) is connected between one of the outputs and the source (14) of the FET transistor (19. Further a capacitor (10) is connected between one of the input and the source of the FET transistor. The gate (8) of the FET transistor is connected to ground.
摘要翻译： 本发明涉及一种用于检测RF信号（7）的功率的电路，该RF信号（7）包括并联连接到用于提供RF信号的两个输入（2,2'）的FET晶体管（1），以及两个输出（13,13' ），用于检测RF信号（7）的功率。 电路具有电阻（9），其电阻大于FET晶体管（1）的漏极 - 源极电阻。 该电阻器（9）连接在FET晶体管（19）的一个输出端和源极（14）之间。此外，电容器（10）连接在FET晶体管的输入源和源极之一中，栅极（8） ）的FET晶体管连接到地。
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公开(公告)号：US20050111587A1
公开(公告)日：2005-05-26
申请号：US10473417
申请日：2001-11-30
摘要： A high performance demodulator able to realize a further wide band property, low distortion characteristics, and low power consumption in comparison with a conventional multi-port demodulator and having a small fluctuation in characteristics with respect to temperature fluctuations and aging and comprising a five-port junction circuit 101 receiving a received signal Sr and a local signal Slo generated at a local signal generation circuit 102, generating three signals having a phase difference, detecting signal levels (amplitude components) of these signals to obtain three power detection signals (baseband signals) P1, P2, and P3; a first multiplier 103 for multiplying the power detection signal P1 output from a first power detector of the five-port junction circuit 101 by a coefficient A1 (=(κ21/κ11)2) for canceling square components of an interference signal and a local signal; a second multiplier 104 for multiplying the power detection signal P1 output from the first power detector by a coefficient A2 (=(κ31/κ11)2) for canceling square components of an interference signal and a local signal; a first subtractor 105 for subtracting a multiplication result of the first multiplier 103 from the power detection signal P2 output from a second power detector of the five-port junction circuit 101; a second subtractor 106 for subtracting the multiplication result of the second multiplier 104 from the power detection signal P3 output from a third power detector of the five-port junction circuit 101; and a multi-port signal-to-IQ signal conversion circuit 109 for converting the result to an In-phase signal I and a quadrature signal Q as demodulated signals based on the output signals of the first subtractor 105 and the second subtractor 106.
摘要翻译： 与传统的多端口解调器相比，能够实现更宽带特性，低失真特性和低功耗的高性能解调器，并且相对于温度波动和老化具有小的特性波动，并且包括五端口 接收接收信号Sr和在本地信号发生电路102产生的本地信号Slo，产生具有相位差的三个信号，检测这些信号的信号电平（振幅分量）以获得三个功率检测信号（基带信号） P 1，P 2和P 3; 第一乘法器103，用于将从五端口电路101的第一功率检测器输出的功率检测信号P 1乘以系数A 1（=（kappa 21 / kappa＆lt; / SUB>） 2），用于消除干扰信号和本地信号的平方分量; 第二乘法器104，用于将从第一功率检测器输出的功率检测信号P 1乘以系数A 2（=（kappa 31 / kappa）11） ），用于消除干扰信号和本地信号的平方分量; 第一减法器105，用于从从五端口电路101的第二功率检测器输出的功率检测信号P 2中减去第一乘法器103的相乘结果; 第二减法器106，用于从从五端口电路101的第三功率检测器输出的功率检测信号P 3中减去第二乘法器104的相乘结果; 以及用于将结果转换为基于第一减法器105和第二减法器106的输出信号的解调信号的同相信号I和正交信号Q的多端口信号到IQ信号转换电路109。
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公开(公告)号：US06710716B1
公开(公告)日：2004-03-23
申请号：US10048538
申请日：2002-01-31
IPC分类号： G08B2100
CPC分类号： H03D1/18
摘要： A high performance power detector not only suited for monolithic structures, small in size, low in cost, and suitabed for broadband high frequency operations, but also excellent in the linearity of the detection characteristic, having a small fluctuation of detection characteristic relative to the bias fluctuation, having a small fluctuation of detection characteristic relative to the FET threshold voltage fluctuation, and in addition having a small DC offset wherein an additional circuit is unnecessary even if the latter stage circuit has a balance input, and a demodulator using the same.
摘要翻译： 高性能功率检测器不仅适用于单块结构，尺寸小，成本低，适用于宽带高频操作，而且具有优异的检测特性线性度，相对于偏置具有较小的检测特性波动 波动，相对于FET阈值电压波动具有小的检测特性波动，并且另外具有小的DC偏移，其中即使后级电路具有平衡输入也不需要附加电路，以及使用该偏移的解调器。
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公开(公告)号：US06803814B1
公开(公告)日：2004-10-12
申请号：US09502656
申请日：2000-02-11
申请人： Dragan Krupezevic , Veselin Brankovic , Gerald Oberschmidt , Masayoshi Abe , Tino Konschak , Thomas Dölle
发明人： Dragan Krupezevic , Veselin Brankovic , Gerald Oberschmidt , Masayoshi Abe , Tino Konschak , Thomas Dölle
IPC分类号： H03D300
摘要： A demodulator for modulated RF signals comprises a passive four port structure (1). The four port structure (1) has a first input (3) for supplying a modulated RF signal to be demodulated. A second input (2) is supplied with a RF signal from a local oscillator (21). Two output terminals are connected to power sensors (4, 5). The RF signal from the local oscillator (21) is supplied to the second input (3) of the four port structure (1) without being RF switched by an RF switch. The demodulator is particularly useful for modulation schemes with a finite number of magnitude states (nQAM modulation).
摘要翻译： 用于调制RF信号的解调器包括无源四端口结构（1）。 四端口结构（1）具有用于提供待解调的调制RF信号的第一输入端（3）。 第二输入（2）被提供有来自本地振荡器（21）的RF信号。 两个输出端子连接到功率传感器（4,5）。 来自本地振荡器（21）的RF信号被提供给四端口结构（1）的第二输入端（3），而不用RF开关进行RF切换。 解调器对于具有有限数量级的状态（nQAM调制）的调制方案特别有用。
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公开(公告)号：US06748203B1
公开(公告)日：2004-06-08
申请号：US09672643
申请日：2000-09-28
申请人： Veselin Brankovic , Dragan Krupezevic , Gerald Oberschmidt , Tino Konschak , Thomas Dölle , Hamid Amir-Alikhani , Masayoshi Abe
发明人： Veselin Brankovic , Dragan Krupezevic , Gerald Oberschmidt , Tino Konschak , Thomas Dölle , Hamid Amir-Alikhani , Masayoshi Abe
IPC分类号： H04B106
摘要： A three port structure for the down conversion demodulation of a digitally modulated RF signal is proposed, wherein no RF switches are provided. The three port structure (1) has a first input (2) for the RF signal to be down converted and a second input (3) for a RF signal originating from a local oscillator (8). An output (4) of the three port structure (1) is supplied to a power sensor unit (5). The RF signal from the local oscillator (8) is modulated (7) before it is supplied to the three port structure (1).
摘要翻译： 提出了一种用于数字调制RF信号的下变频解调的三端口结构，其中不提供RF开关。 三端口结构（1）具有用于RF信号被降频转换的第一输入端（2）和用于源自本地振荡器（8）的RF信号的第二输入端（3）。 三端口结构（1）的输出（4）被提供给功率传感器单元（5）。 来自本地振荡器（8）的RF信号在被提供给三端口结构（1）之前被调制（7）。
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公开(公告)号：US06539215B1
公开(公告)日：2003-03-25
申请号：US09578755
申请日：2000-05-25
IPC分类号： H04B126
CPC分类号： H04L27/2331 , H03D3/007 , H03D9/04 , H04B1/30
摘要： A down converter for RF signals comprises one three port junction (7) having one input port six for modulated digital RF signals and two output ports (8, 9). The output ports (8, 9) are respectively connected to a power sensor (10, 11). The three port junction (7) comprises a power splitter (16) dividing the signal supply to the input terminal (6) of the two branches, processing means (17, 18, 19, 21, 22, 23, 24) for processing one of the branches and a four port junction device (20) for combining the two branches and for generating two output signals to be supplied to the output terminals (8, 9) of the three port junction (7). The processing means can comprise a delay unit (18) or alternatively a frequency divider (21), a plurality of filters (22, 24) and a frequency multiplicator (23).
摘要翻译： 用于RF信号的下变频器包括一个三端口结（7），其具有用于调制的数字RF信号的一个输入端口6和两个输出端口（8,9）。 输出端口（8,9）分别连接到功率传感器（10,11）。 三端口（7）包括功率分配器（16），将信号源分配给两个分支的输入端（6），处理装置（17,18,19,21,22,23,24）用于处理一个 和用于组合两个分支并用于产生要提供给三端口（7）的输出端子（8,9）的两个输出信号的四端口连接装置（20）。 处理装置可以包括延迟单元（18）或可替代地分频器（21），多个滤波器（22,24）和频率倍增器（23）。
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公开(公告)号：US06507733B1
公开(公告)日：2003-01-14
申请号：US09461794
申请日：1999-12-15
IPC分类号： H04B126
摘要： The present invention proposes a direct receiver technique based on one power measurement and time multiplexing of input signals. The proposed technique allows I/Q demodulation. The proposed technique bases on the passive linear three-port high frequency circuitry (1) having two RF signal input (2, 5) and one output port (3) attached to a power sensor (4). The signals output from the power sensor (4) is low pass filtered (17) and supplied to a DC interface. The proposed linear three-port circuitry (1) contains at least one RF switch and at least one passive circuit having at least one phase shifter functionality.
摘要翻译： 本发明提出了基于一个功率测量和输入信号的时间复用的直接接收机技术。 所提出的技术允许I / Q解调。 所提出的技术基于具有连接到功率传感器（4）的两个RF信号输入（2,5）和一个输出端口（3）的无源线性三端口高频电路（1）。 从功率传感器（4）输出的信号被低通滤波（17）并提供给DC接口。 所提出的线性三端口电路（1）包含至少一个RF开关和至少一个具有至少一个移相器功能的无源电路。
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