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公开(公告)号:US20110081774A1
公开(公告)日:2011-04-07
申请号:US12575280
申请日:2009-10-07
申请人: Matt Yeh , Hui Ouyang , Da-Yuan Lee , Kuang Yuan Hsu , Hun-Jan Tao , Xiong-Fei Yu
发明人: Matt Yeh , Hui Ouyang , Da-Yuan Lee , Kuang Yuan Hsu , Hun-Jan Tao , Xiong-Fei Yu
IPC分类号: H01L21/28
CPC分类号: H01L29/401 , H01L21/823828 , H01L21/823835 , H01L21/823842 , H01L29/66545
摘要: A method for fabricating a semiconductor device is disclosed. In one embodiment, the method may include providing a substrate; forming a gate structure including a first dummy gate over the substrate; removing the first dummy gate from the gate structure to form a trench; forming an interfacial layer, high-k dielectric layer, and capping layer to partially fill in the trench; forming a second dummy gate over the capping layer, wherein the second dummy gate fills the trench; and replacing the second dummy gate with a metal gate. In one embodiment, the method may include providing a substrate; forming an interfacial layer over the substrate; forming a high-k dielectric layer over the interfacial layer; forming an etch stop layer over the high-k dielectric layer; forming a capping layer including a low thermal budget silicon over the etch stop layer; forming a dummy gate layer over the capping layer; forming a gate structure; and performing a gate replacement process.
摘要翻译: 公开了一种制造半导体器件的方法。 在一个实施例中,该方法可以包括提供衬底; 在所述衬底上形成包括第一虚拟栅极的栅极结构; 从栅极结构去除第一伪栅极以形成沟槽; 形成界面层,高k电介质层和覆盖层以部分地填充在沟槽中; 在所述覆盖层上形成第二虚拟栅极,其中所述第二伪栅极填充所述沟槽; 并用金属栅极替换第二虚拟栅极。 在一个实施例中,该方法可以包括提供衬底; 在衬底上形成界面层; 在界面层上形成高k电介质层; 在所述高k电介质层上形成蚀刻停止层; 在所述蚀刻停止层上形成包括低热预算硅的覆盖层; 在覆盖层上形成虚拟栅极层; 形成栅极结构; 并进行门更换处理。
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公开(公告)号:US08367563B2
公开(公告)日:2013-02-05
申请号:US12575280
申请日:2009-10-07
申请人: Matt Yeh , Hui Ouyang , Da-Yuan Lee , Kuang Yuan Hsu , Hun-Jan Tao , Xiong-Fei Yu
发明人: Matt Yeh , Hui Ouyang , Da-Yuan Lee , Kuang Yuan Hsu , Hun-Jan Tao , Xiong-Fei Yu
IPC分类号: H01L21/3205
CPC分类号: H01L29/401 , H01L21/823828 , H01L21/823835 , H01L21/823842 , H01L29/66545
摘要: A method for fabricating a semiconductor device is disclosed. In one embodiment, the method may include providing a substrate; forming a gate structure including a first dummy gate over the substrate; removing the first dummy gate from the gate structure to form a trench; forming an interfacial layer, high-k dielectric layer, and capping layer to partially fill in the trench; forming a second dummy gate over the capping layer, wherein the second dummy gate fills the trench; and replacing the second dummy gate with a metal gate. In one embodiment, the method may include providing a substrate; forming an interfacial layer over the substrate; forming a high-k dielectric layer over the interfacial layer; forming an etch stop layer over the high-k dielectric layer; forming a capping layer including a low thermal budget silicon over the etch stop layer; forming a dummy gate layer over the capping layer; forming a gate structure; and performing a gate replacement process.
摘要翻译: 公开了一种制造半导体器件的方法。 在一个实施例中,该方法可以包括提供衬底; 在所述衬底上形成包括第一虚拟栅极的栅极结构; 从栅极结构去除第一伪栅极以形成沟槽; 形成界面层,高k电介质层和覆盖层以部分地填充在沟槽中; 在所述覆盖层上形成第二虚拟栅极,其中所述第二伪栅极填充所述沟槽; 并用金属栅极替换第二虚拟栅极。 在一个实施例中,该方法可以包括提供衬底; 在衬底上形成界面层; 在界面层上形成高k电介质层; 在所述高k电介质层上形成蚀刻停止层; 在所述蚀刻停止层上形成包括低热预算硅的覆盖层; 在覆盖层上形成虚拟栅极层; 形成栅极结构; 并进行门更换处理。
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