公开(公告)号：US20230403015A1

公开(公告)日：2023-12-14

申请号：US18203671

申请日：2023-05-31

申请人： MEDIATEK INC.

发明人： Tsz-Bin Liu ,  Mohammed Mohsen Abdulsalam Abdullatif ,  Ahmed Safwat Mohamed Aboelenein Elmallah ,  Mohammed Tamer Ali

IPC分类号： H03L7/099 ,  H03B5/12 ,  H03L7/08

CPC分类号： H03L7/099 ,  H03B5/124 ,  H03L7/0807 ,  H03B2200/0042

摘要： A multi-path voltage-controlled oscillator (VCO) includes a VCO core circuit and a control voltage generator circuit. The VCO core circuit includes a varactor that has a control node for receiving a control voltage. The control voltage generator circuit receives at least one proportional path (P-path) control input and an integral path (I-path) control input, and generates and outputs the control voltage to the control node of the varactor according to the at least one P-path control input and the I-path control input.

公开(公告)号：US20240162906A1

公开(公告)日：2024-05-16

申请号：US18488785

申请日：2023-10-17

申请人： MediaTek Inc.

发明人： Ahmed Safwat Mohamed Aboelenein Elmallah ,  Mohammed Mohsen Abdulsalam Abdullatif ,  Tamer Mohammed Ali

IPC分类号： H03L7/093

CPC分类号： H03L7/093

摘要： The techniques described herein relate to systems, apparatus, articles of manufacture, and methods for optimum loop gain calibration for clock data recovery and phase locked loop. An example apparatus includes a phase detector with a phase detector output and configured to generate an error signal representative of a difference between an input signal and a feedback signal. The apparatus further includes a calibrator circuit with a calibrator input coupled to the phase detector output and configured to determine correlation value associated with the error signal, and determine a gain value based on an adjustment of an absolute value of the correlation value by a pseudorandom binary sequence signal.