公开(公告)号：US20160054387A1

公开(公告)日：2016-02-25

申请号：US14812219

申请日：2015-07-29

Applicant: MediaTek Inc.

Inventor： Kok-Tiong TEE ,  Heng-Meng LIU ,  Yipin WU

IPC: G01R31/3177

CPC classification number: G01R31/31725 ,  G01R31/3016

Abstract: A method for providing an on-chip variation determination and an integrated circuit utilizing the same are provided. The method includes: outputting, by a launch register circuit, a test data to the capture register circuit according to the first clock; receiving, by a capture register circuit, the test data from the launch register circuit according to the second clock; adjusting, by a control circuit, a first number of a first chain of delay elements to generate the first clock and a second number of a second chain of delay elements for the capture register circuit to just capture the test data to generate the second clock; and determining, by the control circuit, a path delay between the launch register circuit and the capture register circuit based on the first number of the first chain of delay elements and the second number of the second chain of delay elements.

Abstract translation: 提供了一种用于提供片上变化确定的方法和利用其的集成电路。 该方法包括：通过发射寄存器电路根据第一时钟将测试数据输出到捕获寄存器电路; 由捕获寄存器电路根据第二时钟从发射寄存器电路接收测试数据; 通过控制电路调节第一数量的延迟元件的第一链，以产生第一时钟和第二数量的延迟元件链，用于捕捉寄存器电路仅捕捉测试数据以产生第二时钟; 以及由所述控制电路基于所述第一延迟元件链的所述第一数量和所述第二延迟元件链，确定所述发射寄存器电路和所述捕获寄存器电路之间的路径延迟。