FUSE/RESISTOR UTILIZING INTERCONNECT AND VIAS AND METHOD OF MAKING
    1.
    发明申请
    FUSE/RESISTOR UTILIZING INTERCONNECT AND VIAS AND METHOD OF MAKING 有权
    使用互连和VIAS的熔断器/电阻器及其制造方法

    公开(公告)号:US20140353797A1

    公开(公告)日:2014-12-04

    申请号:US13907497

    申请日:2013-05-31

    摘要: A semiconductor structure comprising a fuse/resistor structure over a functional layer having a substrate. The fuse/resistor structure includes a via, a first interconnect layer, and a second interconnect layer. The via is over the functional layer and has a first end and a second end vertically opposite the first end, wherein the first end is bounded by a first edge and a second edge opposite the first edge and the second end is bounded by a third edge and a fourth edge opposite the third edge. The first interconnect layer includes a first metal layer running horizontally and contacting the first end and completely extending from the first edge to the second edge. The second interconnect layer includes a second metal layer running horizontally and contacting the second end of the via and extending past the third edge but reaching less than half way to the fourth edge.

    摘要翻译: 一种半导体结构,包括在具有衬底的功能层上的熔丝/电阻器结构。 熔丝/电阻器结构包括通孔,第一互连层和第二互连层。 通孔在功能层之上,并且具有与第一端垂直相对的第一端和第二端,其中第一端由第一边缘和与第一边缘相对的第二边缘限定,第二端由第三边缘 以及与第三边缘相对的第四边缘。 第一互连层包括水平延伸并接触第一端并从第一边缘到第二边缘完全延伸的第一金属层。 第二互连层包括水平延伸并接触通孔的第二端并延伸超过第三边缘但到达不到第四边缘的一半的第二金属层。