-
公开(公告)号：US20200251161A1
公开(公告)日：2020-08-06
申请号：US16268507
申请日：2019-02-06
发明人： George ELIAS , Hillel CHAPMAN , Eitan ZAHAVI , Elad MENTOVICH
IPC分类号： G11C11/406
摘要： One or more blocks of dynamic random access memory are embedded together with a processor and a data bus on an integrated circuit. The data bus has a bandwidth b for general operation including memory access, the block of dynamic random access memory further requiring data refresh at a refresh rate r. The block thus forms an eDRAM on the integrated circuit, typically an ASIC. A refresh controller embedded with the eDRAM may control refresh by clocking the data bus at a rate higher than the rate of the data bus to accommodate both the required memory access and the required data refresh.
-
公开(公告)号：US20190098793A1
公开(公告)日：2019-03-28
申请号：US15717399
申请日：2017-09-27
发明人： Yaakov GRIDISH , Elad MENTOVICH , Eitan ZAHAVI , Sylvie ROCKMAN
摘要： An internally wireless datacenter rack configured to support datacenter computing equipment is provided. The datacenter rack includes a housing configured to receive a first networking box including a printed circuit board assembly and one or more wireless connectors in electrical communication with the printed circuit board assembly. The housing includes a second networking box including a printed circuit board assembly and one or more wireless connectors in electrical communication with the printed circuit board assembly. The one or more wireless connectors convert between electrical signals and optical signals. The datacenter rack includes a wireless free space region within the housing, and the wireless free space region includes a wireless reflective backplane that allows free space wireless communication between the first networking box and the second networking box.
-
搜索结果
2 条记录 (耗时 0.009 秒)
