摘要:
Techniques for assigning multipaths to finger processors to achieve the desired data performance and low power consumption are described. A search is initially performed to obtain a set of multipaths for a transmission from at least one base station. At least one multipath (e.g., the minimum number of multipaths) having a combined performance metric (e.g., a combined SNR) exceeding a threshold is identified. The at least one multipath is assigned to, and processed by, at least one finger processor to recover the transmission from the base station(s).
摘要:
Techniques for assigning multipaths to finger processors to achieve the desired data performance and low power consumption are described. A search is initially performed to obtain a set of multipaths for a transmission from at least one base station. At least one multipath (e.g., the minimum number of multipaths) having a combined performance metric (e.g., a combined SNR) exceeding a threshold is identified. The at least one multipath is assigned to, and processed by, at least one finger processor to recover the transmission from the base station(s).
摘要:
Certain aspects of the present disclosure relate to a method for processing wireless communications. According to one aspect, a processing unit may receive a plurality of code blocks of a transport block and schedule the plurality of code blocks to be decoded in parallel with a plurality of decoders. Each decoder decodes at least one code block as an independent tasks. The processing unit further collects the decoded information bits from the plurality of decoders and forwards the collected decoded information bits for further processing. In one aspect, the processing unit includes an output agent to temporarily store the decoded information bits while waiting for all code blocks of the transport block to be decoded.
摘要:
A wireless communication signal in Long Term Evolution (LTE) may be interleaved in a manner which permits a partitioning of a received inter-column bit-reversed interleaved code block for improved de-interleaving. The code block may be divided into equal subportions which may be simultaneously de-interleaved both forward and backward, and in parallel with other subportions. An even number of subportions may be provided. Dividing a received code block in this manner may improve de-interleaving performance.
摘要:
Methods and apparatuses are provided for use in devices that are enabled to receive control channel information over a link having a plurality of interlaced slots. The methods and apparatuses may be implemented to selectively disable/enable one or more circuits within a receiver path at selected times.
摘要:
A packet-based processing system suitable for various applications, such as for a base station or a terminal in a wireless communication system, is described. The packet-based processing system may include multiple processing modules and at least one transport module. The processing modules may send packets to one another via a common packet interface and may operate asynchronously. The transport module(s) may forward the packets sent by the processing modules and may operate asynchronously with respect to the processing modules. Each processing module may include a network interface, at least one buffer, a packet parser, a packet builder, and at least one processing unit. Each processing module may support at least one service. Each packet may include a header and a payload. The header may include a source service address for a source service sending the packet and a destination service address for a recipient service receiving the packet.
摘要:
A packet-based processing system suitable for various applications, such as for a base station or a terminal in a wireless communication system, is described. The packet-based processing system may include multiple processing modules and at least one transport module. The processing modules may send packets to one another via a common packet interface and may operate asynchronously. The transport module(s) may forward the packets sent by the processing modules and may operate asynchronously with respect to the processing modules. Each processing module may include a network interface, at least one buffer, a packet parser, a packet builder, and at least one processing unit. Each processing module may support at least one service. Each packet may include a header and a payload. The header may include a source service address for a source service sending the packet and a destination service address for a recipient service receiving the packet.
摘要:
Methods and apparatuses are provided for use in devices that are enabled to receive control channel information over a link having a plurality of interlaced slots. The methods and apparatuses may be implemented to selectively disable/enable one or more circuits within a receiver path at selected times.