公开(公告)号：US5734910A

公开(公告)日：1998-03-31

申请号：US577831

申请日：1995-12-22

申请人： Michael Joseph Corrigan ,  Steven Leonard Jones ,  Larry Wayne Loen ,  David Robert Russell, Jr. ,  Philip Braun Winterfield

发明人： Michael Joseph Corrigan ,  Steven Leonard Jones ,  Larry Wayne Loen ,  David Robert Russell, Jr. ,  Philip Braun Winterfield

IPC分类号： G06F9/46 ,  G06F9/48

CPC分类号： G06F9/4812 ,  G06F9/463

摘要： A synchronous interrupt handler for a processing system executing multiple modes of operation employs a minimum number of lines of interrupt handler code written to execute at the "zeroth" level, is combined with a virtualized interrupt vector table. An identical zeroeth level handler is inserted at each of the processor's interrupt vector entry pints. These short code sequences are the first to gain control following an interrupt. They are handwritten in the platform's native instruction set to be mode-independent. For example, if the platform's processor does not alter the "endianness" of the machine state following an interrupt, the "zeroeth level" code must be written for endian neutrality; likewise, for 32/64-bit mode, etc. For each mode of operation, there is created a Virtualized Vector Table to represent the proper interrupt handlers for each physical interrupt level. Each task data structure, implicitly reflecting its unique mode of operation, contains a pointer to its virtualized vector table. The zeroeth-level handlers then extract the virtualized vector table reference for their own interrupt level and indirectly pass control to the preloaded table value.

摘要翻译： 执行多种操作模式的处理系统的同步中断处理程序使用写入“第零”级执行的最少数量的中断处理程序代码与虚拟中断向量表组合。 每个处理器的中断向量入口品位都插入相同的零级处理器。 这些短代码序列是在中断之后首先获得控制的。 它们在平台的本机指令集中手写成与模式无关。 例如，如果平台的处理器不会在中断之后改变机器状态的“字节顺序”，则必须为端点中立写入“零级”代码; 同样，对于+ E，fra 32/64 + EE位模式等。对于每种操作模式，都创建了一个虚拟化向量表来表示每个物理中断级别的适当的中断处理程序。 每个任务数据结构，隐含地反映其唯一的操作模式，包含一个指向其虚拟向量表的指针。 零级处理程序然后提取虚拟化向量表引用自己的中断级别，并将控制间接地传递给预加载的表值。

公开(公告)号：US5710909A

公开(公告)日：1998-01-20

申请号：US590134

申请日：1996-01-23

申请人： Jeffrey Douglas Brown ,  Scott Douglas Clark ,  Michael Joseph Corrigan ,  Kent Harold Haselhorst ,  Larry Wayne Loen

发明人： Jeffrey Douglas Brown ,  Scott Douglas Clark ,  Michael Joseph Corrigan ,  Kent Harold Haselhorst ,  Larry Wayne Loen

IPC分类号： G06F12/02 ,  G06F12/08 ,  G06F12/00

CPC分类号： G06F12/023 ,  G06F12/08 ,  G06F2212/401 ,  Y10S707/99953 ,  Y10S707/99956

摘要： A data compression utilization method and apparatus are provided for a computer main store. An amount of unused memory in the computer system main store is dynamically calculated and compared with a plurality of predefined threshold values. One interrupt of a plurality of predefined interrupts is selectively generated responsive to the compared values. Then the usage of the computer system main store is adjusted responsive to the generated interrupt.

摘要翻译： 为计算机主存储提供数据压缩利用方法和装置。 计算机系统主存储器中的未使用的存储器的量被动态地计算并与多个预定阈值进行比较。 响应于所比较的值选择性地产生多个预定中断的一个中断。 然后根据产生的中断来调整计算机系统主存储的使用情况。

公开(公告)号：US06317816B1

公开(公告)日：2001-11-13

申请号：US09240035

申请日：1999-01-29

申请人： Larry Wayne Loen

发明人： Larry Wayne Loen

IPC分类号： G06F1208

CPC分类号： G06F12/0842 ,  G06F12/0253 ,  Y10S707/99944

摘要： The present invention is a method of allocating memory storage in a memory storage space commonly shared by multiple processors. The method allocates a minimum apparent memory storage space equal to one cache line and in response to storing an object, said object occupying a memory storage space equal to less than one cache line, the method determines the value of a variable. The method then allocates said memory storage space for said object based on the value of said variable and updates said variable.

摘要翻译： 本发明是一种在多个处理器共同共享的存储器存储空间中分配存储器的方法。 该方法分配等于一个高速缓存行的最小表观存储器存储空间，并且响应于存储对象，所述对象占据等于小于一个高速缓存行的存储器存储空间，该方法确定变量的值。 然后，该方法基于所述变量的值为所述对象分配所述存储器存储空间，并更新所述变量。

公开(公告)号：US06438560B1

公开(公告)日：2002-08-20

申请号：US09397211

申请日：1999-09-16

申请人： Larry Wayne Loen

发明人： Larry Wayne Loen

IPC分类号： G06F1730

CPC分类号： G06F17/30607 ,  Y10S707/955 ,  Y10S707/99944

摘要： An apparatus, program product, and method of processing a request to create an immutable object reuse an existing immutable object in appropriate circumstances to represent redundant data without the necessity for creating an additional immutable object. Prior to creating a new object in response to a request to create an immutable object, a determination is made as to whether a matching immutable object already exists that has the same contents as the requested immutable object. If so, creation of a new object is inhibited, and a reference to the matching immutable object is returned in response to the request.

摘要翻译： 处理创建不可变对象的请求的装置，程序产品和方法在适当的情况下重用现有的不可变对象以表示冗余数据，而不需要创建附加的不可变对象。 在响应于创建不可变对象的请求创建新对象之前，确定是否存在与所请求的不可变对象具有相同内容的匹配的不可变对象。 如果是这样，则禁止创建新对象，并且响应于请求返回对匹配的不可变对象的引用。

公开(公告)号：US06341345B1

公开(公告)日：2002-01-22

申请号：US08475669

申请日：1995-06-07

申请人： Marc Alan Auslander ,  Larry Wayne Loen

发明人： Marc Alan Auslander ,  Larry Wayne Loen

IPC分类号： G06F1202

CPC分类号： G06F9/34 ,  G06F9/3824 ,  G06F12/0802 ,  G06F13/4013

摘要： A conventional bi-endian computer system is enhanced to include mixed-endian mechanisms that allows the computer system to dynamically change its endian mode. The mixed-endian computer system can change endian mode on a task by task basis if necessary. The mixed-endian mechanisms automatically format the data in the form expected by the running task, regardless of whether the task expects the data to be in big endian format or in little endian format. The mixed-endian mechanisms also format big and little endian instructions such that they can execute on the same computer system. The mixed-endian mechanisms also include two memory management mechanisms, a single aliased memory management mechanism and a double aliased memory management mechanism. Each memory management mechanism provides cross-endian data sharing.

摘要翻译： 传统的双端计算机系统被增强以包括允许计算机系统动态地改变其端模式的混合端机制。 如果需要，混合端计算机系统可以根据任务改变任务的端序模式。 混合端机制自动以运行任务所期望的形式格式化数据，而不管任务是期望数据是大端格式还是小端格式。 混合端机制还可以制作大而小的端序指令，使其可以在同一台计算机系统上执行。 混合端机制还包括两个内存管理机制，一个别名的内存管理机制和一个双别名的内存管理机制。 每个内存管理机制提供跨端数据共享。

公开(公告)号：US5968164A

公开(公告)日：1999-10-19

申请号：US116050

申请日：1998-07-15

申请人： Larry Wayne Loen ,  Edward John Silha

发明人： Larry Wayne Loen ,  Edward John Silha

IPC分类号： G06F9/46 ,  G06F9/34 ,  G06F9/38 ,  G06F12/08 ,  G06F13/40 ,  G06F9/308 ,  G06F12/02

CPC分类号： G06F9/34 ,  G06F12/0802 ,  G06F13/4013 ,  G06F9/3824

摘要： A conventional bi-endian computer system is enhanced to include mixed-endian mechanisms that allows the computer system to dynamically change its endian mode. The mixed-endian computer system can change endian mode on a task by task basis if necessary. The mixed-endian mechanisms automatically format the data in the form expected by the running task, regardless of whether the task expects the data to be in big endian format or in little endian format. The mixed-endian mechanisms also format big and little endian instructions such that they can execute on the same computer system.

摘要翻译： 传统的双端计算机系统被增强以包括允许计算机系统动态地改变其端模式的混合端机制。 如果需要，混合端计算机系统可以根据任务改变任务的端序模式。 混合端机制自动以运行任务所期望的形式格式化数据，而不管任务是期望数据是大端格式还是小端格式。 混合端机制还可以制作大而小的端序指令，使其可以在同一台计算机系统上执行。

公开(公告)号：US5928349A

公开(公告)日：1999-07-27

申请号：US393968

申请日：1995-02-24

申请人： Larry Wayne Loen ,  Edward John Silha

发明人： Larry Wayne Loen ,  Edward John Silha

IPC分类号： G06F9/46 ,  G06F9/34 ,  G06F9/38 ,  G06F12/08 ,  G06F13/40 ,  G06F7/00

CPC分类号： G06F9/34 ,  G06F12/0802 ,  G06F13/4013 ,  G06F9/3824

摘要： A conventional bi-endian computer system is enhanced to include mixed-endian mechanisms that allows the computer system to dynamically change its endian mode. The mixed-endian computer system can change endian mode on a task by task basis if necessary. The mixed-endian mechanisms automatically format the data in the form expected by the running task, regardless of whether the task expects the data to be in big endian format or in little endian formate. The mixed-endian mechanisms also format big and little endian instructions such that they can execute on the same computer system.

摘要翻译： 传统的双端计算机系统被增强以包括允许计算机系统动态地改变其端模式的混合端机制。 如果需要，混合端计算机系统可以根据任务改变任务的端序模式。 混合端机制自动将数据格式化为正在运行的任务所期望的形式，无论该任务是期望数据是大端格式还是小端序格式。 混合端机制还可以制作大而小的端序指令，使其可以在同一台计算机系统上执行。

公开(公告)号：US08140568B2

公开(公告)日：2012-03-20

申请号：US10017783

申请日：2001-12-13

申请人： Abdo Esmail Abdo ,  Larry Wayne Loen

发明人： Abdo Esmail Abdo ,  Larry Wayne Loen

IPC分类号： G06F17/30

CPC分类号： G06F17/30469 ,  G06F17/30536

摘要： In processing a query including a selection criterion on one or more attributes of a relation, a prior statistic generated for a prior different selection criterion on the same one or more attributes of the relation, may be revalidated for use in processing the query, based upon a measure of the entropy of the one or more attributes of the relation. In this way, the re-validation of statistics may be performed more efficiently. Furthermore, attribute groups of a relation for which multi-dimensional indexes are to be formed, are identified by evaluating the correlation of attribute values within tuples of the relation and determining that the correlation of attribute values within tuples of the relation exceeds a threshold.

摘要翻译： 在处理包括关系的一个或多个属性的选择标准的查询时，可以基于关于该关系的相同一个或多个属性的先前不同选择标准生成的先前统计量被重新验证以用于处理查询，基于 衡量该关系的一个或多个属性的熵。 以这种方式，可以更有效地执行统计的重新验证。 此外，通过评估该关系的元组内的属性值的相关性并确定该关系的元组内的属性值的相关性超过阈值来识别要形成多维索引的关系的属性组。

公开(公告)号：US06434625B1

公开(公告)日：2002-08-13

申请号：US09351663

申请日：1999-07-13

申请人： Larry Wayne Loen

发明人： Larry Wayne Loen

IPC分类号： G06F1516

CPC分类号： H04L29/06

摘要： A computer system and method for use with the computer system to dynamically adapt to a data structure layout other than its own. The data may be an incoming data stream from outside or may be stored within its main memory. Between the transmitting and the receiving CPU there must be an understanding of the conceptual level and format of the data which is transferred. A prefix word in which details of the data structure layout is encoded is generated. The prefix word is appended to the data and transmitted to another CPU or used by the same CPU. Upon receipt of the data, the prefix word is read and decoded and the receiving CPU can dynamically adapt to details of the data structure layout in order to use the data which was generated and transmitted in a heretofore unknown data structure layout. The prefix word may be a Unicode reserved character of the form FExxyyFF or FFyyxxFE wherein FExxyyFF represents the same endianness, preferably big endian, and FFyyxxFE represents the other endianness, preferably little endian. Once endianness is resolved, then the position of xxyy is unambiguously known and specific features of the data structure layout, such as integer and pointer sizes, rounding/padding rules, byte alignment, bit alignment, etc. are encoded in an agreed-upon bit sequence. Thus, a method and a computer which can dynamically adapt to an unknown data structure is presented.

摘要翻译： 一种计算机系统和方法，用于与计算机系统动态地适应其自身以外的数据结构布局。 数据可以是来自外部的输入数据流，也可以存储在其主存储器内。 在发送和接收CPU之间，必须了解传输的数据的概念级别和格式。 生成数据结构布局的细节被编码的前缀字。 前缀字附加到数据并发送到另一个CPU或由同一个CPU使用。 在接收到数据时，读取和解码前缀字，并且接收CPU可以动态地适应数据结构布局的细节，以便使用在以前未知的数据结构布局中生成和发送的数据。 前缀字可以是FExxyyFF或FFyyxxFE形式的Unicode保留字符，其中FExxyyFF表示相同的字节顺序，优选大字节，而FFyyxxFE表示另一个字节序，最好是小尾数。 一旦字节顺序被解决，则xxyy的位置是明确已知的，并且数据结构布局的特定特征（例如整数和指针大小，舍入/填充规则，字节对齐，位对齐等）被编码在商定的位 序列。 因此，提出了可以动态地适应未知数据结构的方法和计算机。

公开(公告)号：US5781763A

公开(公告)日：1998-07-14

申请号：US861914

申请日：1997-05-22

申请人： Bruce Leroy Beukema ,  Gary Scott Delp ,  Larry Wayne Loen ,  Daniel Frank Moertl ,  Michael R. Trombley

发明人： Bruce Leroy Beukema ,  Gary Scott Delp ,  Larry Wayne Loen ,  Daniel Frank Moertl ,  Michael R. Trombley

IPC分类号： G06F13/40 ,  G06F13/28

CPC分类号： G06F13/4013

摘要： A mixed-endian computer system enhanced to manage I/O DMA without a software DMA performance penalty. A mixed-endian computer system can change endian mode on a task by task basis if necessary. The mixed-endian system, as enhanced, performs one of two well-defined DMA operations based on control bits either in the DMA control register or in a bit vector associated with each page of processor storage. This invention also describes means for treating I/O registers as if they were of the endian of the executing processor, instead of the more typical need to have the register operate in a particular endian.

摘要翻译： 增强了一种混合端计算机系统，可以管理I / O DMA，而不会造成DMA性能损失。 如果需要，混合端计算机系统可以根据任务改变任务的端序模式。 混合端系统（如增强型）基于DMA控制寄存器中的控制位或与每个处理器存储页相关联的位向量执行两个定义良好的DMA操作之一。 本发明还描述了用于处理I / O寄存器的装置，就像它们是执行处理器的端序一样，而不是更典型地需要使寄存器在特定的端序中操作。