-
公开(公告)号：US06523106B1
公开(公告)日：2003-02-18
申请号：US09217774
申请日：1998-12-21
IPC分类号： G06P1580
CPC分类号： G06F9/3885 , G06F9/30032 , G06F9/3017 , G06F9/3836 , G06F9/3842
摘要： Only one pipe in superscalar microprocessor contains particular functional logic necessary to process a specific instruction. When the specific instruction appears in an instruction stream, the microprocessor replicates the specific instruction so that there are as many identical instructions in the stream as there are pipes. The identical instructions appear contiguously in the instruction stream. Each identical instruction is processed by a different one of the pipes. The pipe with the particular functional logic performs the necessary operations for the specific instruction while the other pipes treat the instruction as a null operation.
摘要翻译： 超标量微处理器中只有一个管道包含处理特定指令所需的特定功能逻辑。 当特定指令出现在指令流中时，微处理器复制特定指令，使得流中存在与管道相同的指令。 相同的指令在指令流中连续显示。 每个相同的指令由不同的管道处理。 具有特定功能逻辑的管道对特定指令执行必要的操作，而其他管道将该指令视为空操作。
-
公开(公告)号：US20210303372A1
公开(公告)日：2021-09-30
申请号：US16833454
申请日：2020-03-27
申请人： Umberto Santoni , Philip Abraham
发明人： Umberto Santoni , Philip Abraham
摘要： Systems, methods, and apparatuses relating to circuitry to implement lockstep of processor cores are described. In one embodiment, a hardware processor comprises a first processor core comprising a first control flow signature register and a first execution circuit, a second processor core comprising a second control flow signature register and a second execution circuit, and at least one signature circuit to perform a first state history compression operation on a first instruction that executes on the first execution circuit of the first processor core to produce a first result, store the first result in the first control flow signature register, perform a second state history compression operation on a second instruction that executes on the second execution circuit of the second processor core to produce a second result, and store the second result in the second control flow signature register.
-
3.发明授权公开(公告)号：US06594392B2
公开(公告)日：2003-07-15
申请号：US09312920
申请日：1999-05-17
申请人： Umberto Santoni
发明人： Umberto Santoni
IPC分类号： G06K962
CPC分类号： G06K9/6217
摘要： The present invention is a method and apparatus to determine a similarity measure between first and second patterns. First and second storages store first and second feature vectors which represent the first and second patterns, respectively. A similarity estimator is coupled to the first and second storages to compute a similarity probability of the first and second feature vectors using a piecewise linear probability density function (PDF). The similarity probability corresponds to the similarity measure.
摘要翻译： 本发明是一种确定第一和第二图案之间的相似性度量的方法和装置。 第一和第二存储器分别存储表示第一和第二图案的第一和第二特征向量。 相似度估计器耦合到第一和第二存储器以使用分段线性概率密度函数（PDF）来计算第一和第二特征向量的相似概率。 相似度概率对应于相似性度量。
-
公开(公告)号：US5487133A
公开(公告)日：1996-01-23
申请号：US86514
申请日：1993-07-01
申请人： Chin S. Park , Mark A. Holler , Jay M. Diamond , Siang-Chun The , Umberto Santoni , Kenneth R. Buckmann
发明人： Chin S. Park , Mark A. Holler , Jay M. Diamond , Siang-Chun The , Umberto Santoni , Kenneth R. Buckmann
CPC分类号： G06K9/6271 , G06K9/6215 , G06K9/6287 , G06N3/063
摘要： An adaptive distance calculating neural network classifier chip accepts high dimensionality input pattern vectors with up to 256 5-bit elements per vector and compares the input vector with up to 1024 prototype vectors stored on-chip by calculating the distance between the input vector and each of the prototype vectors. The classifier further provides for identifying up to 64 classes to which the prototype vectors belong. If the distance between input and prototype vector is less than a programmable threshold distance, the prototype fires and the class to which it belongs is identified. If prototype vectors belonging to more than one class fire, a probabilistic model based on Parzen windows may be invoked to resolve the classification by providing the relative probabilities of various class membership. The classifier chip is trainable by supplying appropriate training vectors and associated class membership. Distance and probability parameters are generated during training and are stored for use in the classification mode. Incremental training is also provided so that additional prototypes may be added to an existing base. In order to extend the classifier capacity, multichip operation is provided under the supervision of a system administrator controller/CPU.
摘要翻译： 自适应距离计算神经网络分类器芯片接收高维度输入模式向量，每个向量具有高达256个5位元素，并通过计算输入向量与每个矢量之间的距离来比较输入向量与存储在片上的多达1024个原型矢量 原型向量。 分类器进一步提供识别原型向量所属的多达64个类。 如果输入和原型向量之间的距离小于可编程阈值距离，则原型将被触发并识别其所属的类。 如果属于多于一级的原型矢量，则可以调用基于Parzen窗口的概率模型，通过提供各种类成员的相对概率来解析分类。 分类器芯片可通过提供适当的训练向量和相关的类成员进行训练。 距离和概率参数在训练过程中生成，并存储在分类模式中。 还提供增量式培训，以便将其他原型添加到现有基地。 为了扩展分类器容量，在系统管理员控制器/ CPU的监督下提供多芯片操作。
-
公开(公告)号：US11340960B2
公开(公告)日：2022-05-24
申请号：US16833454
申请日：2020-03-27
申请人： Umberto Santoni , Philip Abraham
发明人： Umberto Santoni , Philip Abraham
摘要： Systems, methods, and apparatuses relating to circuitry to implement lockstep of processor cores are described. In one embodiment, a hardware processor comprises a first processor core comprising a first control flow signature register and a first execution circuit, a second processor core comprising a second control flow signature register and a second execution circuit, and at least one signature circuit to perform a first state history compression operation on a first instruction that executes on the first execution circuit of the first processor core to produce a first result, store the first result in the first control flow signature register, perform a second state history compression operation on a second instruction that executes on the second execution circuit of the second processor core to produce a second result, and store the second result in the second control flow signature register.
-
-
-
-
搜索结果
5 条记录 (耗时 0.018 秒)
