公开(公告)号：US06330697B1

公开(公告)日：2001-12-11

申请号：US09294866

申请日：1999-04-20

申请人： Michael P. Clinton ,  Klaus G. F. Enk ,  Russell J. Houghton ,  Alan D. Norris ,  Josef T. Schnell

发明人： Michael P. Clinton ,  Klaus G. F. Enk ,  Russell J. Houghton ,  Alan D. Norris ,  Josef T. Schnell

IPC分类号： G11C2900

CPC分类号： G11C29/025 ,  G11C11/401 ,  G11C29/02 ,  G11C29/028 ,  G11C29/50 ,  G11C2029/5004 ,  G11C2029/5006

摘要： A Defect Leakage Screen Test apparatus and method is introduced to eliminate or reduce steps in the failure analysis process of memory devices, such as DRAM cells, or to eliminate the necessity for the application of a physical failure analysis on the memory device. Special single bit failures due to leakage current, junction current, or threshold leakage current, are characterized by varying the p-well voltage of the memory device during the read operation of the test. The p-well voltage is varied with a test code Initial Program Load (IPL). Additional logic is provided on the memory IC to decode the IPL logic signals. In order to perform the p-well varying test, the memory device is provided with the following: IPL decoding logic; a reference voltage generator; an IPL voltage reference multiplexor; a p-well voltage feed-back circuit; and a differential amplifier circuit.

摘要翻译： 缺陷泄漏屏幕引入了测试设备和方法来消除或减少诸如DRAM单元之类的存储器件的故障分析过程中的步骤，或消除在存储器件上应用物理故障分析的必要性。特殊单位 由漏电流，结电流或阈值漏电流引起的故障的特征在于，在测试的读取操作期间改变存储器件的p阱电压.P阱电压随测试代码初始程序负载 IPL）。 在存储器IC上提供附加逻辑以对IPL逻辑信号进行解码。为了执行p阱变化测试，存储器件具有以下内容：IPL解码逻辑; 参考电压发生器; IPL电压参考多路复用器; p阱电压反馈电路; 和差分放大电路。

公开(公告)号：US5847591A

公开(公告)日：1998-12-08

申请号：US829256

申请日：1997-03-31

申请人： Josef T. Schnell

发明人： Josef T. Schnell

IPC分类号： G05F3/26 ,  G11C5/14 ,  G11C29/06 ,  H03K5/08

CPC分类号： G11C5/14

摘要： The voltage detection and control circuit includes a voltage detect circuit having an associated switch point greater than a first predetermined voltage, with the voltage detect circuit being responsive to an input voltage greater than the first predetermined voltage for generating an activation signal; and a clamp control circuit, responsive to the activation signal, for clamping an operating voltage to a second predetermined voltage. The second predetermined voltage may be substantially equal to the first predetermined voltage. A spike filter may be included for suppressing spikes in the activation signal. A clamp stage control circuit is provided for suppressing oscillations in the second predetermined voltage. At least one clamp stage, which may include a delay device, provides the operating voltage to a corresponding circuit component as well as reducing current peaks in the corresponding circuit component. The voltage detect circuit may include a current mirror, responsive to a first current generated from the input voltage, for generating a second current substantially equal to the first current for generating the activation signal.

摘要翻译： 电压检测和控制电路包括具有大于第一预定电压的相关开关点的电压检测电路，电压检测电路响应大于第一预定电压的输入电压以产生激活信号; 以及钳位控制电路，其响应于所述激活信号，将工作电压钳位到第二预定电压。 第二预定电压可以基本上等于第一预定电压。 可以包括尖峰滤波器以抑制激活信号中的尖峰。 提供了用于抑制第二预定电压中的振荡的钳位级控制电路。 可以包括延迟装置的至少一个钳位级将工作电压提供给相应的电路部件以及减小对应的电路部件中的电流峰值。 电压检测电路可以包括响应于从输入电压产生的第一电流的电流镜，用于产生基本上等于用于产生激活信号的第一电流的第二电流。