公开(公告)号：US4630267A

公开(公告)日：1986-12-16

申请号：US680409

申请日：1984-12-10

申请人： Michel L. Costes ,  Gene D. Hodge

发明人： Michel L. Costes ,  Gene D. Hodge

IPC分类号： H04B7/212 ,  H04J3/06

CPC分类号： H04B7/2125

摘要： The disclosed circuit employs a single programmable timer and address decoder which identifies a plurality of bursts received from other stations in a TDMA communications network by means by identifying their origin addresses, and then starts associated timing intervals in the programmable timer for each burst. The instant when the intervals being timed terminate, corresponds approximately to the instant at which the local station should commence its transmission burst. The programmable timer and synchronizer associates each of a plurality of timing intervals with each of the plurality of transmitting stations in the TDMA network, and terminates each respective interval at approximately the same instant in a given local station, thus allowing the time for commencement of the local station's transmission burst to be reliably determined without regard for the participation of any more than one other of the plurality of transmitting stations in the TDMA network. This enables a TDMA communications system to be democratically synchronized in a reliable manner.

摘要翻译： 所公开的电路采用单个可编程定时器和地址解码器，其通过识别其起始地址来标识从TDMA通信网络中的其他站接收的多个突发，然后在每个突发中启动可编程定时器中的相关定时间隔。 当间隔定时终止的时刻大致对应于本地站应该开始传输突发的时刻。 可编程定时器和同步器将多个定时间隔中的每一个与TDMA网络中的多个发射站中的每一个相关联，并且在给定的本地站中大致相同的时刻终止每个相应的间隔，从而允许开始 本地站的传输突发可靠地确定，而不考虑TDMA网络中多个发射站中的多于一个的参与。 这使得TDMA通信系统能够以可靠的方式进行民主地同步。

公开(公告)号：US4285064A

公开(公告)日：1981-08-18

申请号：US79927

申请日：1979-09-28

申请人： Gene D. Hodge

发明人： Gene D. Hodge

IPC分类号： H04J3/00 ,  H04B7/15 ,  H04B7/212 ,  H04B7/185

CPC分类号： H04B7/2123

摘要： A time division multiple access satellite communication architecture is disclosed to achieve a relatively simple control procedure for permitting multiple computers to establish peer coupled transmission paths for high speed transfer by dynamically allocating satellite communication facilities in a sequentially shared broadcast mode. Each sequentially established CPU-to-CPU logical link takes the form of a point-to-multipoint sub-network which incorporates a standard data link control protocol for the control of information transfer. The function of the primary station is sequentially passed from station to station within the network and as each station assumes primary control of its logical point-to-multipoint circuit, other stations conform to the secondary role for that logical link configuration.

摘要翻译： 公开了一种时分多址卫星通信架构，以实现相对简单的控制程序，以允许多台计算机通过以顺序共享广播模式动态分配卫星通信设施来建立用于高速传输的对等耦合传输路径。 每个顺序建立的CPU到CPU逻辑链路采用点对多点子网的形式，其包含用于控制信息传输的标准数据链路控制协议。 主站的功能在网络内从站到站顺序通过，并且当每个站对其逻辑点对多点电路进行主要控制时，其他站符合该逻辑链路配置的辅助角色。