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公开(公告)号:US20210084726A1
公开(公告)日:2021-03-18
申请号:US17013978
申请日:2020-09-08
Applicant: Microchip Technology Incorporated
Inventor: Josh Averyt , Shannon Cash , Matthew Kalibat
IPC: H05B45/325 , H05B45/18 , B60K37/02 , B60Q3/18
Abstract: A PWM lighting bridge manages hardware PWM compensation components. One or more PWM outputs are driven based upon a master PWM input signal. The master PWM input signal is processed through a mapping function to produce a desired output signal(s) on the one or more PWM outputs. The mapping function comprises a set of compensation bins having a maxim input duty cycle, a minimum input duty cycle and an output duty cycle. The mapping process selects a bin based on determining whether the input duty cycle is within the minimum and maximum duty cycle ranges of the bins and then uses the specified output duty cycle for the one or more PWM outputs. The PWM lighting bridge provides configuration and runtime management of the hardware PWM compensation components. Read/write access to the PWM compensation bins provides customizable configurations of the input and output PWM characteristics.
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公开(公告)号:US20200012326A1
公开(公告)日:2020-01-09
申请号:US16146232
申请日:2018-09-28
Applicant: Microchip Technology Incorporated
Inventor: Brigham Steele , Andrew Rogers , Shannon Cash , Matthew Kalibat
IPC: G06F1/26 , H02J1/14 , G06F13/38 , G01R21/133 , G06F1/28 , G05F1/66 , G05B19/042
Abstract: A Universal Serial Bus (USB) dock includes ports, a processor, and instructions to cause the processor, below a level of an operating system running applications and accessing the USB dock, identify a first port of the plurality of ports as a priority port. The processor may be further caused to detect a connection to the dock. The processor may be further caused to determine whether a candidate port to which the connection is made is the priority port. The processor may be further caused to, based on a determination that the candidate port is the priority port, recover power from other ports and advertise power capabilities of the priority port to a USB element connecting to the dock.
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公开(公告)号:US11132040B2
公开(公告)日:2021-09-28
申请号:US16146232
申请日:2018-09-28
Applicant: Microchip Technology Incorporated
Inventor: Brigham Steele , Andrew Rogers , Shannon Cash , Matthew Kalibat
IPC: G06F1/26 , G01R21/133 , G05B19/042 , G05F1/66 , G06F1/28 , G06F13/38 , H02J1/14
Abstract: A Universal Serial Bus (USB) dock includes ports, a processor, and instructions to cause the processor, below a level of an operating system running applications and accessing the USB dock, identify a first port of the plurality of ports as a priority port. The processor may be further caused to detect a connection to the dock. The processor may be further caused to determine whether a candidate port to which the connection is made is the priority port. The processor may be further caused to, based on a determination that the candidate port is the priority port, recover power from other ports and advertise power capabilities of the priority port to a USB element connecting to the dock.
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公开(公告)号:US11825575B2
公开(公告)日:2023-11-21
申请号:US17013978
申请日:2020-09-08
Applicant: Microchip Technology Incorporated
Inventor: Josh Averyt , Shannon Cash , Matthew Kalibat
IPC: H05B45/18 , H05B45/325 , B60Q3/18 , B60K37/02
CPC classification number: H05B45/325 , B60K37/02 , B60Q3/18 , H05B45/18 , B60K2370/332 , B60K2370/349
Abstract: A PWM lighting bridge manages hardware PWM compensation components. One or more PWM outputs are driven based upon a master PWM input signal. The master PWM input signal is processed through a mapping function to produce a desired output signal(s) on the one or more PWM outputs. The mapping function comprises a set of compensation bins having a maxim input duty cycle, a minimum input duty cycle and an output duty cycle. The mapping process selects a bin based on determining whether the input duty cycle is within the minimum and maximum duty cycle ranges of the bins and then uses the specified output duty cycle for the one or more PWM outputs. The PWM lighting bridge provides configuration and runtime management of the hardware PWM compensation components. Read/write access to the PWM compensation bins provides customizable configurations of the input and output PWM characteristics.
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