Current-Controlled Buffer Using Analog Bias
    1.
    发明公开

    公开(公告)号:US20240248861A1

    公开(公告)日:2024-07-25

    申请号:US18506229

    申请日:2023-11-10

    CPC classification number: G06F13/20 G06F2213/0002

    Abstract: A semiconductor device includes a pair of transistors configured to implement buffering of input data to outputs. The semiconductor device also includes a first transistor configured to receive a common-mode of the outputs at a gate terminal of the first transistor. The semiconductor device also includes a current source configured to control a tail current from the pair of transistors. Additionally, the semiconductor device includes a second transistor configured to adjust the tail current based at least in part on changes in a reference voltage used by the pair of transistors to buffer the input data. Furthermore, the semiconductor device includes a third transistor configured to adjust the tail current based at least in part on changes in locally generated reference voltage based at least in part on a process and temperature variations.

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