公开(公告)号：US20220343985A1

公开(公告)日：2022-10-27

申请号：US17238818

申请日：2021-04-23

Applicant: Micron Technology, Inc.

Inventor： Scott A. Stoller ,  Pitamber Shukla ,  Kishore Kumar Muchherla ,  Fulvio Rori ,  Bin Wang

IPC: G11C16/34 ,  G11C16/08 ,  G11C16/24 ,  G11C16/10 ,  G11C16/26 ,  G11C16/30

Abstract: Described are systems and methods for providing power loss immunity in memory programming operations. An example memory device comprises: a memory array comprising a plurality of memory cells electrically coupled to a plurality of wordlines and a plurality of bitlines; and a controller coupled to the memory array, the controller to perform operations comprising: causing a programming pulse to be applied to to one or more wordlines of the memory array; responsive to determining that a threshold voltage of one or more memory cells of the memory array has reached a pre-program verify level, causing a first bias voltage level to be applied to a first subset of bitlines of the memory array and causing a second bias voltage level to be applied to a second subset of bitlines of the memory array.

公开(公告)号：US11967386B2

公开(公告)日：2024-04-23

申请号：US17747761

申请日：2022-05-18

Applicant: Micron Technology, Inc.

Inventor： Bin Wang ,  Pitamber Shukla ,  Scott A. Stoller

IPC: G11C11/34 ,  G11C16/10 ,  G11C16/34

CPC classification number: G11C16/3459 ,  G11C16/102

Abstract: An apparatus can include a touch-up component. The touch-up component can detect that at least one memory cell of a page of memory cells has lost a portion of a charge. The touch-up component can set touch-up parameters for the page of memory cells. The touch-up component can cause a transfer of data from the page of memory cells to a cache. The touch-up component can reprogram the at least one memory cell using the set touch-up parameters.

公开(公告)号：US20230377664A1

公开(公告)日：2023-11-23

申请号：US17747761

申请日：2022-05-18

Applicant: Micron Technology, Inc.

Inventor： Bin Wang ,  Pitamber Shukla ,  Scott A. Stoller

IPC: G11C16/34 ,  G11C16/10

CPC classification number: G11C16/3459 ,  G11C16/102

Abstract: An apparatus can include a touch-up component. The touch-up component can detect that at least one memory cell of a page of memory cells has lost a portion of a charge. The touch-up component can set touch-up parameters for the page of memory cells. The touch-up component can cause a transfer of data from the page of memory cells to a cache. The touch-up component can reprogram the at least one memory cell using the set touch-up parameters.

公开(公告)号：US11594292B2

公开(公告)日：2023-02-28

申请号：US17238818

申请日：2021-04-23

Applicant: Micron Technology, Inc.

Inventor： Scott A. Stoller ,  Pitamber Shukla ,  Kishore Kumar Muchherla ,  Fulvio Rori ,  Bin Wang

IPC: G11C16/06 ,  G11C16/34 ,  G11C16/08 ,  G11C16/30 ,  G11C16/10 ,  G11C16/26 ,  G11C16/24

Abstract: Described are systems and methods for providing power loss immunity in memory programming operations. An example memory device comprises: a memory array comprising a plurality of memory cells electrically coupled to a plurality of wordlines and a plurality of bitlines; and a controller coupled to the memory array, the controller to perform operations comprising: causing a programming pulse to be applied to to one or more wordlines of the memory array; responsive to determining that a threshold voltage of one or more memory cells of the memory array has reached a pre-program verify level, causing a first bias voltage level to be applied to a first subset of bitlines of the memory array and causing a second bias voltage level to be applied to a second subset of bitlines of the memory array.